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Paul Walmsley
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OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c
The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via direct System Control Module writes on OMAP2+. This required the omap_ctrl_{read,write}l() functions to be exported, which is against policy: the only code that should call those functions directly is OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no longer exported, so the driver no longer builds as a module. Fix the pinmuxing part of the problem by removing calls to omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c. Due to the unfortunate way that McBSP support is implemented in ASoC and the OMAP tree, these symbols must be exported for use by sound/soc/omap/omap-mcbsp.c. Going forward, the McBSP device driver should be moved from arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver should be implemented as a platform_driver as many other ASoC CPU DAI drivers are. These two steps should resolve many of the layering problems, which will rapidly reappear during a McBSP hwmod/PM runtime conversion. Signed-off-by: Paul Walmsley <[email protected]> Acked-by: Jarkko Nikula <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Acked-by: Liam Girdwood <[email protected]> Acked-by: Mark Brown <[email protected]>
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arch/arm/mach-omap2/mcbsp.c

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,37 @@
2222
#include <plat/dma.h>
2323
#include <plat/cpu.h>
2424
#include <plat/mcbsp.h>
25+
#include <plat/control.h>
2526

27+
/* McBSP internal signal muxing functions */
28+
29+
void omap2_mcbsp1_mux_clkr_src(u8 mux)
30+
{
31+
u32 v;
32+
33+
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
34+
if (mux == CLKR_SRC_CLKR)
35+
v &= OMAP2_MCBSP1_CLKR_MASK;
36+
else if (mux == CLKR_SRC_CLKX)
37+
v |= OMAP2_MCBSP1_CLKR_MASK;
38+
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
39+
}
40+
EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
41+
42+
void omap2_mcbsp1_mux_fsr_src(u8 mux)
43+
{
44+
u32 v;
45+
46+
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
47+
if (mux == FSR_SRC_FSR)
48+
v &= OMAP2_MCBSP1_FSR_MASK;
49+
else if (mux == FSR_SRC_FSX)
50+
v |= OMAP2_MCBSP1_FSR_MASK;
51+
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
52+
}
53+
EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
54+
55+
/* Platform data */
2656

2757
#ifdef CONFIG_ARCH_OMAP2420
2858
static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {

arch/arm/plat-omap/include/plat/control.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,8 @@
223223
#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
224224
#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
225225
#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
226+
#define OMAP2_MCBSP1_FSR_MASK (1 << 4)
227+
#define OMAP2_MCBSP1_CLKR_MASK (1 << 3)
226228
#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
227229

228230
/* CONTROL_DEVCONF1 bits */

arch/arm/plat-omap/include/plat/mcbsp.h

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -312,6 +312,14 @@
312312
#define RFSREN 0x0002
313313
#define RSYNCERREN 0x0001
314314

315+
/* CLKR signal muxing options */
316+
#define CLKR_SRC_CLKR 0
317+
#define CLKR_SRC_CLKX 1
318+
319+
/* FSR signal muxing options */
320+
#define FSR_SRC_FSR 0
321+
#define FSR_SRC_FSX 1
322+
315323
/* we don't do multichannel for now */
316324
struct omap_mcbsp_reg_cfg {
317325
u16 spcr2;
@@ -501,7 +509,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
501509
int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
502510
int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
503511

504-
505512
/* SPI specific API */
506513
void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
507514

@@ -510,6 +517,10 @@ int omap_mcbsp_pollread(unsigned int id, u16 * buf);
510517
int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
511518
int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
512519

520+
/* McBSP signal muxing API */
521+
void omap2_mcbsp1_mux_clkr_src(u8 mux);
522+
void omap2_mcbsp1_mux_fsr_src(u8 mux);
523+
513524
#ifdef CONFIG_ARCH_OMAP3
514525
/* Sidetone specific API */
515526
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);

arch/arm/plat-omap/mcbsp.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@
2727

2828
#include <plat/dma.h>
2929
#include <plat/mcbsp.h>
30+
#include <plat/control.h>
3031

3132
#include "../mach-omap2/cm-regbits-34xx.h"
3233

sound/soc/omap/omap-mcbsp.c

Lines changed: 17 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -661,48 +661,23 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
661661
return 0;
662662
}
663663

664-
static int omap_mcbsp_dai_set_rcvr_src(struct omap_mcbsp_data *mcbsp_data,
665-
int clk_id)
666-
{
667-
int sel_bit, set = 0;
668-
u16 reg = OMAP2_CONTROL_DEVCONF0;
669-
670-
if (cpu_class_is_omap1())
671-
return -EINVAL; /* TODO: Can this be implemented for OMAP1? */
672-
if (mcbsp_data->bus_id != 0)
673-
return -EINVAL;
674-
675-
switch (clk_id) {
676-
case OMAP_MCBSP_CLKR_SRC_CLKX:
677-
set = 1;
678-
case OMAP_MCBSP_CLKR_SRC_CLKR:
679-
sel_bit = 3;
680-
break;
681-
case OMAP_MCBSP_FSR_SRC_FSX:
682-
set = 1;
683-
case OMAP_MCBSP_FSR_SRC_FSR:
684-
sel_bit = 4;
685-
break;
686-
default:
687-
return -EINVAL;
688-
}
689-
690-
if (set)
691-
omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
692-
else
693-
omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
694-
695-
return 0;
696-
}
697-
698664
static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
699665
int clk_id, unsigned int freq,
700666
int dir)
701667
{
702668
struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
703669
struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
670+
struct omap_mcbsp_platform_data *pdata = cpu_dai->dev->platform_data;
704671
int err = 0;
705672

673+
/* The McBSP signal muxing functions are only available on McBSP1 */
674+
if (clk_id == OMAP_MCBSP_CLKR_SRC_CLKR ||
675+
clk_id == OMAP_MCBSP_CLKR_SRC_CLKX ||
676+
clk_id == OMAP_MCBSP_FSR_SRC_FSR ||
677+
clk_id == OMAP_MCBSP_FSR_SRC_FSX)
678+
if (cpu_class_is_omap1() || mcbsp_data->bus_id != 0)
679+
return -EINVAL;
680+
706681
mcbsp_data->in_freq = freq;
707682

708683
switch (clk_id) {
@@ -720,11 +695,18 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
720695
regs->pcr0 |= SCLKME;
721696
break;
722697

698+
723699
case OMAP_MCBSP_CLKR_SRC_CLKR:
700+
omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKR);
701+
break;
724702
case OMAP_MCBSP_CLKR_SRC_CLKX:
703+
omap2_mcbsp1_mux_clkr_src(CLKR_SRC_CLKX);
704+
break;
725705
case OMAP_MCBSP_FSR_SRC_FSR:
706+
omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSR);
707+
break;
726708
case OMAP_MCBSP_FSR_SRC_FSX:
727-
err = omap_mcbsp_dai_set_rcvr_src(mcbsp_data, clk_id);
709+
omap2_mcbsp1_mux_fsr_src(FSR_SRC_FSX);
728710
break;
729711
default:
730712
err = -ENODEV;

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