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1 parent 6ce5bfe commit cf8f9aaCopy full SHA for cf8f9aa
drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1144,6 +1144,19 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
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/* WaEnableStateCacheRedirectToCS:icl */
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whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
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+
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+ /*
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+ * WaAllowPMDepthAndInvocationCountAccessFromUMD:icl
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+ *
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+ * This covers 4 register which are next to one another :
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+ * - PS_INVOCATION_COUNT
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+ * - PS_INVOCATION_COUNT_UDW
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+ * - PS_DEPTH_COUNT
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+ * - PS_DEPTH_COUNT_UDW
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+ */
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+ whitelist_reg_ext(w, PS_INVOCATION_COUNT,
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+ RING_FORCE_TO_NONPRIV_RD |
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+ RING_FORCE_TO_NONPRIV_RANGE_4);
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break;
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case VIDEO_DECODE_CLASS:
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