|
13 | 13 | * any warranty of any kind, whether express or implied.
|
14 | 14 | */
|
15 | 15 |
|
| 16 | +/dts-v1/; |
| 17 | + |
16 | 18 | / {
|
17 | 19 | #address-cells = <2>;
|
18 | 20 | #size-cells = <1>;
|
19 | 21 | model = "acube,sam440ep";
|
20 | 22 | compatible = "acube,sam440ep";
|
21 |
| - dcr-parent = <&/cpus/cpu@0>; |
22 | 23 |
|
23 | 24 | aliases {
|
24 | 25 | ethernet0 = &EMAC0;
|
|
39 | 40 | reg = <0>;
|
40 | 41 | clock-frequency = <0>; /* Filled in by zImage */
|
41 | 42 | timebase-frequency = <0>; /* Filled in by zImage */
|
42 |
| - i-cache-line-size = <20>; |
43 |
| - d-cache-line-size = <20>; |
44 |
| - i-cache-size = <8000>; |
45 |
| - d-cache-size = <8000>; |
| 43 | + i-cache-line-size = <32>; |
| 44 | + d-cache-line-size = <32>; |
| 45 | + i-cache-size = <32768>; |
| 46 | + d-cache-size = <32768>; |
46 | 47 | dcr-controller;
|
47 | 48 | dcr-access-method = "native";
|
48 | 49 | };
|
|
57 | 58 | compatible = "ibm,uic-440ep","ibm,uic";
|
58 | 59 | interrupt-controller;
|
59 | 60 | cell-index = <0>;
|
60 |
| - dcr-reg = <0c0 009>; |
| 61 | + dcr-reg = <0x0c0 9>; |
61 | 62 | #address-cells = <0>;
|
62 | 63 | #size-cells = <0>;
|
63 | 64 | #interrupt-cells = <2>;
|
|
67 | 68 | compatible = "ibm,uic-440ep","ibm,uic";
|
68 | 69 | interrupt-controller;
|
69 | 70 | cell-index = <1>;
|
70 |
| - dcr-reg = <0d0 009>; |
| 71 | + dcr-reg = <0x0d0 9>; |
71 | 72 | #address-cells = <0>;
|
72 | 73 | #size-cells = <0>;
|
73 | 74 | #interrupt-cells = <2>;
|
74 |
| - interrupts = <1e 4 1f 4>; /* cascade */ |
| 75 | + interrupts = <0x1e 4 0x1f 4>; /* cascade */ |
75 | 76 | interrupt-parent = <&UIC0>;
|
76 | 77 | };
|
77 | 78 |
|
78 | 79 | SDR0: sdr {
|
79 | 80 | compatible = "ibm,sdr-440ep";
|
80 |
| - dcr-reg = <00e 002>; |
| 81 | + dcr-reg = <0x00e 2>; |
81 | 82 | };
|
82 | 83 |
|
83 | 84 | CPR0: cpr {
|
84 | 85 | compatible = "ibm,cpr-440ep";
|
85 |
| - dcr-reg = <00c 002>; |
| 86 | + dcr-reg = <0x00c 2>; |
86 | 87 | };
|
87 | 88 |
|
88 | 89 | plb {
|
|
94 | 95 |
|
95 | 96 | SDRAM0: sdram {
|
96 | 97 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
|
97 |
| - dcr-reg = <010 2>; |
| 98 | + dcr-reg = <0x010 2>; |
98 | 99 | };
|
99 | 100 |
|
100 | 101 | DMA0: dma {
|
101 | 102 | compatible = "ibm,dma-440ep", "ibm,dma-440gp";
|
102 |
| - dcr-reg = <100 027>; |
| 103 | + dcr-reg = <0x100 0x027>; |
103 | 104 | };
|
104 | 105 |
|
105 | 106 | MAL0: mcmal {
|
106 | 107 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
|
107 |
| - dcr-reg = <180 62>; |
| 108 | + dcr-reg = <0x180 0x062>; |
108 | 109 | num-tx-chans = <4>;
|
109 | 110 | num-rx-chans = <2>;
|
110 | 111 | interrupt-parent = <&MAL0>;
|
111 | 112 | interrupts = <0 1 2 3 4>;
|
112 | 113 | #interrupt-cells = <1>;
|
113 | 114 | #address-cells = <0>;
|
114 | 115 | #size-cells = <0>;
|
115 |
| - interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 |
116 |
| - /*RXEOB*/ 1 &UIC0 b 4 |
| 116 | + interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 |
| 117 | + /*RXEOB*/ 1 &UIC0 11 4 |
117 | 118 | /*SERR*/ 2 &UIC1 0 4
|
118 | 119 | /*TXDE*/ 3 &UIC1 1 4
|
119 | 120 | /*RXDE*/ 4 &UIC1 2 4>;
|
|
126 | 127 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN
|
127 | 128 | * bits.
|
128 | 129 | */
|
129 |
| - ranges = <00000000 0 00000000 80000000 |
130 |
| - 80000000 0 80000000 80000000>; |
| 130 | + ranges = <0x00000000 0 0x00000000 0x80000000 |
| 131 | + 0x80000000 0 0x80000000 0x80000000>; |
131 | 132 | interrupt-parent = <&UIC1>;
|
132 | 133 | interrupts = <7 4>;
|
133 | 134 | clock-frequency = <0>; /* Filled in by zImage */
|
134 | 135 |
|
135 | 136 | EBC0: ebc {
|
136 | 137 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
|
137 |
| - dcr-reg = <012 2>; |
| 138 | + dcr-reg = <0x012 2>; |
138 | 139 | #address-cells = <2>;
|
139 | 140 | #size-cells = <1>;
|
140 | 141 | clock-frequency = <0>; /* Filled in by zImage */
|
|
145 | 146 | UART0: serial@ef600300 {
|
146 | 147 | device_type = "serial";
|
147 | 148 | compatible = "ns16550";
|
148 |
| - reg = <ef600300 8>; |
149 |
| - virtual-reg = <ef600300>; |
| 149 | + reg = <0xef600300 8>; |
| 150 | + virtual-reg = <0xef600300>; |
150 | 151 | clock-frequency = <0>; /* Filled in by zImage */
|
151 |
| - current-speed = <1c200>; |
| 152 | + current-speed = <0x1c200>; |
152 | 153 | interrupt-parent = <&UIC0>;
|
153 | 154 | interrupts = <0 4>;
|
154 | 155 | };
|
155 | 156 |
|
156 | 157 | UART1: serial@ef600400 {
|
157 | 158 | device_type = "serial";
|
158 | 159 | compatible = "ns16550";
|
159 |
| - reg = <ef600400 8>; |
160 |
| - virtual-reg = <ef600400>; |
| 160 | + reg = <0xef600400 8>; |
| 161 | + virtual-reg = <0xef600400>; |
161 | 162 | clock-frequency = <0>;
|
162 | 163 | current-speed = <0>;
|
163 | 164 | interrupt-parent = <&UIC0>;
|
|
167 | 168 | UART2: serial@ef600500 {
|
168 | 169 | device_type = "serial";
|
169 | 170 | compatible = "ns16550";
|
170 |
| - reg = <ef600500 8>; |
171 |
| - virtual-reg = <ef600500>; |
| 171 | + reg = <0xef600500 8>; |
| 172 | + virtual-reg = <0xef600500>; |
172 | 173 | clock-frequency = <0>;
|
173 | 174 | current-speed = <0>;
|
174 | 175 | interrupt-parent = <&UIC0>;
|
|
178 | 179 | UART3: serial@ef600600 {
|
179 | 180 | device_type = "serial";
|
180 | 181 | compatible = "ns16550";
|
181 |
| - reg = <ef600600 8>; |
182 |
| - virtual-reg = <ef600600>; |
| 182 | + reg = <0xef600600 8>; |
| 183 | + virtual-reg = <0xef600600>; |
183 | 184 | clock-frequency = <0>;
|
184 | 185 | current-speed = <0>;
|
185 | 186 | interrupt-parent = <&UIC0>;
|
|
191 | 192 | #size-cells = <0>;
|
192 | 193 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
|
193 | 194 | index = <0>;
|
194 |
| - reg = <ef600700 14>; |
| 195 | + reg = <0xef600700 0x14>; |
195 | 196 | interrupt-parent = <&UIC0>;
|
196 | 197 | interrupts = <2 4>;
|
197 | 198 | rtc@68 {
|
198 | 199 | compatible = "stm,m41t80";
|
199 |
| - reg = <68>; |
| 200 | + reg = <0x68>; |
200 | 201 | };
|
201 | 202 | };
|
202 | 203 |
|
203 | 204 | IIC1: i2c@ef600800 {
|
204 | 205 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
|
205 | 206 | index = <5>;
|
206 |
| - reg = <ef600800 14>; |
| 207 | + reg = <0xef600800 0x14>; |
207 | 208 | interrupt-parent = <&UIC0>;
|
208 | 209 | interrupts = <7 4>;
|
209 | 210 | };
|
210 | 211 |
|
211 | 212 | ZMII0: emac-zmii@ef600d00 {
|
212 | 213 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
|
213 |
| - reg = <ef600d00 c>; |
| 214 | + reg = <0xef600d00 0xc>; |
214 | 215 | };
|
215 | 216 |
|
216 | 217 | EMAC0: ethernet@ef600e00 {
|
217 | 218 | linux,network-index = <0>;
|
218 | 219 | device_type = "network";
|
219 | 220 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
|
220 | 221 | interrupt-parent = <&UIC1>;
|
221 |
| - interrupts = <1c 4 1d 4>; |
222 |
| - reg = <ef600e00 70>; |
| 222 | + interrupts = <0x1c 4 0x1d 4>; |
| 223 | + reg = <0xef600e00 0x70>; |
223 | 224 | local-mac-address = [000000000000];
|
224 | 225 | mal-device = <&MAL0>;
|
225 | 226 | mal-tx-channel = <0 1>;
|
226 | 227 | mal-rx-channel = <0>;
|
227 | 228 | cell-index = <0>;
|
228 |
| - max-frame-size = <5dc>; |
229 |
| - rx-fifo-size = <1000>; |
230 |
| - tx-fifo-size = <800>; |
| 229 | + max-frame-size = <0x5dc>; |
| 230 | + rx-fifo-size = <0x1000>; |
| 231 | + tx-fifo-size = <0x800>; |
231 | 232 | phy-mode = "rmii";
|
232 | 233 | phy-map = <00000000>;
|
233 | 234 | zmii-device = <&ZMII0>;
|
|
239 | 240 | device_type = "network";
|
240 | 241 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
|
241 | 242 | interrupt-parent = <&UIC1>;
|
242 |
| - interrupts = <1e 4 1f 4>; |
243 |
| - reg = <ef600f00 70>; |
| 243 | + interrupts = <0x1e 4 0x1f 4>; |
| 244 | + reg = <0xef600f00 0x70>; |
244 | 245 | local-mac-address = [000000000000];
|
245 | 246 | mal-device = <&MAL0>;
|
246 | 247 | mal-tx-channel = <2 3>;
|
247 | 248 | mal-rx-channel = <1>;
|
248 | 249 | cell-index = <1>;
|
249 |
| - max-frame-size = <5dc>; |
250 |
| - rx-fifo-size = <1000>; |
251 |
| - tx-fifo-size = <800>; |
| 250 | + max-frame-size = <0x5dc>; |
| 251 | + rx-fifo-size = <0x1000>; |
| 252 | + tx-fifo-size = <0x800>; |
252 | 253 | phy-mode = "rmii";
|
253 | 254 | phy-map = <00000000>;
|
254 | 255 | zmii-device = <&ZMII0>;
|
255 | 256 | zmii-channel = <1>;
|
256 | 257 | };
|
257 | 258 | usb@ef601000 {
|
258 | 259 | compatible = "ohci-be";
|
259 |
| - reg = <ef601000 80>; |
| 260 | + reg = <0xef601000 0x80>; |
260 | 261 | interrupts = <8 4 9 4>;
|
261 |
| - interrupt-parent = < &UIC1 >; |
| 262 | + interrupt-parent = <&UIC1>; |
262 | 263 | };
|
263 | 264 | };
|
264 | 265 |
|
|
269 | 270 | #address-cells = <3>;
|
270 | 271 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
|
271 | 272 | primary;
|
272 |
| - reg = <0 eec00000 8 /* Config space access */ |
273 |
| - 0 eed00000 4 /* IACK */ |
274 |
| - 0 eed00000 4 /* Special cycle */ |
275 |
| - 0 ef400000 40>; /* Internal registers */ |
| 273 | + reg = <0 0xeec00000 8 /* Config space access */ |
| 274 | + 0 0xeed00000 4 /* IACK */ |
| 275 | + 0 0xeed00000 4 /* Special cycle */ |
| 276 | + 0 0xef400000 0x40>; /* Internal registers */ |
276 | 277 |
|
277 | 278 | /* Outbound ranges, one memory and one IO,
|
278 | 279 | * later cannot be changed. Chip supports a second
|
279 | 280 | * IO range but we don't use it for now
|
280 | 281 | */
|
281 |
| - ranges = <02000000 0 a0000000 0 a0000000 0 20000000 |
282 |
| - 01000000 0 00000000 0 e8000000 0 00010000>; |
| 282 | + ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 |
| 283 | + 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; |
283 | 284 |
|
284 | 285 | /* Inbound 2GB range starting at 0 */
|
285 |
| - dma-ranges = <42000000 0 0 0 0 0 80000000>; |
| 286 | + dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; |
286 | 287 | };
|
287 | 288 | };
|
288 | 289 |
|
|
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