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Merge tag 'irq-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner: "A set of fixes for interrupt chip drivers: - Revert the platform driver conversion of interrupt chip drivers as it turned out to create more problems than it solves. - Fix a trivial typo in the new module helpers which made probing reliably fail. - Small fixes in the STM32 and MIPS Ingenic drivers - The TI firmware rework which had badly managed dependencies and had to wait post rc1" * tag 'irq-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/ingenic: Leave parent IRQ unmasked on suspend irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by mistake irqchip: Revert modular support for drivers using IRQCHIP_PLATFORM_DRIVER helperse irqchip: Fix probing deferal when using IRQCHIP_PLATFORM_DRIVER helpers arm64: dts: k3-am65: Update the RM resource types arm64: dts: k3-am65: ti-sci-inta/intr: Update to latest bindings arm64: dts: k3-j721e: ti-sci-inta/intr: Update to latest bindings irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC irqchip/ti-sci-inta: Do not store TISCI device id in platform device id field dt-bindings: irqchip: Convert ti, sci-inta bindings to yaml dt-bindings: irqchip: ti, sci-inta: Update docs to support different parent. irqchip/ti-sci-intr: Add support for INTR being a parent to INTR dt-bindings: irqchip: Convert ti, sci-intr bindings to yaml dt-bindings: irqchip: ti, sci-intr: Update bindings to drop the usage of gic as parent firmware: ti_sci: Add support for getting resource with subtype firmware: ti_sci: Drop unused structure ti_sci_rm_type_map firmware: ti_sci: Drop the device id to resource type translation
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‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt

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‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 Interrupt Aggregator
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maintainers:
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- Lokesh Vutla <[email protected]>
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allOf:
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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description: |
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The Interrupt Aggregator (INTA) provides a centralized machine
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which handles the termination of system events to that they can
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be coherently processed by the host(s) in the system. A maximum
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of 64 events can be mapped to a single interrupt.
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Interrupt Aggregator
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+-----------------------------------------+
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| Intmap VINT |
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| +--------------+ +------------+ |
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m ------>| | vint | bit | | 0 |.....|63| vint0 |
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. | +--------------+ +------------+ | +------+
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. | . . | | HOST |
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Globalevents ------>| . . |----->| IRQ |
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. | . . | | CTRL |
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. | . . | +------+
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n ------>| +--------------+ +------------+ |
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| | vint | bit | | 0 |.....|63| vintx |
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| +--------------+ +------------+ |
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| |
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+-----------------------------------------+
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Configuration of these Intmap registers that maps global events to vint is
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done by a system controller (like the Device Memory and Security Controller
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on AM654 SoC). Driver should request the system controller to get the range
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of global events and vints assigned to the requesting host. Management
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of these requested resources should be handled by driver and requests
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system controller to map specific global event to vint, bit pair.
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Communication between the host processor running an OS and the system
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controller happens through a protocol called TI System Control Interface
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(TISCI protocol).
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properties:
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compatible:
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const: ti,sci-inta
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reg:
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maxItems: 1
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interrupt-controller: true
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msi-controller: true
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ti,interrupt-ranges:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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description: |
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Interrupt ranges that converts the INTA output hw irq numbers
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to parents's input interrupt numbers.
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items:
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items:
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- description: |
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"output_irq" specifies the base for inta output irq
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- description: |
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"parent's input irq" specifies the base for parent irq
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- description: |
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"limit" specifies the limit for translation
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required:
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- compatible
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- reg
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- interrupt-controller
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- msi-controller
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- ti,sci
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- ti,sci-dev-id
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- ti,interrupt-ranges
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examples:
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- |
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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main_udmass_inta: msi-controller@33d00000 {
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compatible = "ti,sci-inta";
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reg = <0x0 0x33d00000 0x0 0x100000>;
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interrupt-controller;
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msi-controller;
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interrupt-parent = <&main_navss_intr>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <179>;
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ti,interrupt-ranges = <0 0 256>;
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};
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};

‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

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‎Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 Interrupt Router
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maintainers:
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- Lokesh Vutla <[email protected]>
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allOf:
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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description: |
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The Interrupt Router (INTR) module provides a mechanism to mux M
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interrupt inputs to N interrupt outputs, where all M inputs are selectable
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to be driven per N output. An Interrupt Router can either handle edge
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triggered or level triggered interrupts and that is fixed in hardware.
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Interrupt Router
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+----------------------+
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| Inputs Outputs |
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+-------+ | +------+ +-----+ |
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| GPIO |----------->| | irq0 | | 0 | | Host IRQ
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+-------+ | +------+ +-----+ | controller
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| . . | +-------+
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+-------+ | . . |----->| IRQ |
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| INTA |----------->| . . | +-------+
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+-------+ | . +-----+ |
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| +------+ | N | |
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| | irqM | +-----+ |
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| +------+ |
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| |
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+----------------------+
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There is one register per output (MUXCNTL_N) that controls the selection.
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Configuration of these MUXCNTL_N registers is done by a system controller
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(like the Device Memory and Security Controller on K3 AM654 SoC). System
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controller will keep track of the used and unused registers within the Router.
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Driver should request the system controller to get the range of GIC IRQs
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assigned to the requesting hosts. It is the drivers responsibility to keep
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track of Host IRQs.
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Communication between the host processor running an OS and the system
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controller happens through a protocol called TI System Control Interface
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(TISCI protocol).
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properties:
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compatible:
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const: ti,sci-intr
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ti,intr-trigger-type:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 4]
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description: |
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Should be one of the following.
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1 = If intr supports edge triggered interrupts.
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4 = If intr supports level triggered interrupts.
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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description: |
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The 1st cell should contain interrupt router input hw number.
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ti,interrupt-ranges:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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description: |
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Interrupt ranges that converts the INTR output hw irq numbers
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to parents's input interrupt numbers.
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items:
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items:
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- description: |
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"output_irq" specifies the base for intr output irq
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- description: |
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"parent's input irq" specifies the base for parent irq
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- description: |
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"limit" specifies the limit for translation
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required:
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- compatible
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- ti,intr-trigger-type
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- interrupt-controller
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- '#interrupt-cells'
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- ti,sci
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- ti,sci-dev-id
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- ti,interrupt-ranges
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examples:
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- |
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main_gpio_intr: interrupt-controller0 {
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compatible = "ti,sci-intr";
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ti,intr-trigger-type = <1>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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#interrupt-cells = <1>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <131>;
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ti,interrupt-ranges = <0 360 32>;
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};

‎MAINTAINERS

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F: Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
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F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
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F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml
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F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
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F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
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F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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F: drivers/clk/keystone/sci-clk.c

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