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Merge tag 'perf-tools-for-v6.1-1-2022-10-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Pull perf tools updates from Arnaldo Carvalho de Melo: - Add support for AMD on 'perf mem' and 'perf c2c', the kernel enablement patches went via tip. Example: $ sudo perf mem record -- -c 10000 ^C[ perf record: Woken up 227 times to write data ] [ perf record: Captured and wrote 58.760 MB perf.data (836978 samples) ] $ sudo perf mem report -F mem,sample,snoop Samples: 836K of event 'ibs_op//', Event count (approx.): 8418762 Memory access Samples Snoop N/A 700620 N/A L1 hit 126675 N/A L2 hit 424 N/A L3 hit 664 HitM L3 hit 10 N/A Local RAM hit 2 N/A Remote RAM (1 hop) hit 8558 N/A Remote Cache (1 hop) hit 3 N/A Remote Cache (1 hop) hit 2 HitM Remote Cache (2 hops) hit 10 HitM Remote Cache (2 hops) hit 6 N/A Uncached hit 4 N/A $ - "perf lock" improvements: - Add -E/--entries option to limit the number of entries to display, say to ask for just the top 5 contended locks. - Add -q/--quiet option to suppress header and debug messages. - Add a 'perf test' kernel lock contention entry to test 'perf lock'. - "perf lock contention" improvements: - Ask BPF's bpf_get_stackid() to skip some callchain entries. The ones closer to the tooling are bpf related and not that interesting, the ones calling the locking function are the ones we're interested in, example of a full, unskipped callstack: - Allow changing the callstack depth and number of entries to skip. 1 10.74 us 10.74 us 10.74 us spinlock __bpf_trace_contention_begin+0xb 0xffffffffc03b5c47 bpf_prog_bf07ae9e2cbd02c5_contention_begin+0x117 0xffffffffc03b5c47 bpf_prog_bf07ae9e2cbd02c5_contention_begin+0x117 0xffffffffbb8b8e75 bpf_trace_run2+0x35 0xffffffffbb7eab9b __bpf_trace_contention_begin+0xb 0xffffffffbb7ebe75 queued_spin_lock_slowpath+0x1f5 0xffffffffbc1c26ff _raw_spin_lock+0x1f 0xffffffffbb841015 tick_do_update_jiffies64+0x25 0xffffffffbb8409ee tick_irq_enter+0x9e - Show full callstack in verbose mode (-v option), sometimes this is desirable instead of showing just one callstack entry. - Allow multiple time ranges in 'perf record --delay' to help in reducing the amount of data collected from hardware tracing (Intel PT, etc) when there is a rough idea of periods of time where events of interest take time. - Add Intel PT to record only decoder debug messages when error happens. - Improve layout of Intel PT man page. - Add new branch types: alignment, data and inst faults and arch specific ones, such as fiq, debug_halt, debug_exit, debug_inst and debug_data on arm64. Kernel enablement went thru the tip tree. - Fix 'perf probe' error log check in 'perf test' when no debuginfo is available. - Fix 'perf stat' aggregation mode logic, it should be looking at the CPU not at the core number. - Fix flags parsing in 'perf trace' filters. - Introduce compact encoding of CPU range encoding on perf.data, to avoid having a bitmap with all the CPUs. - Improvements to the 'perf stat' metrics, including adding "core_wide", and computing "smt" from the CPU topology. - Add support to the new PERF_FORMAT_LOST perf_event_attr.read_format, that allows tooling to ask for the precise number of lost samples for a given event. - Add 'addr' sort key to see just the address of sampled instructions: $ perf record -o- true | perf report -i- -s addr [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.000 MB - ] # Samples: 12 of event 'cycles:u' # Event count (approx.): 252512 # # Overhead Address # ........ .................. 42.96% 0x7f96f08443d7 29.55% 0x7f96f0859b50 14.76% 0x7f96f0852e02 8.30% 0x7f96f0855028 4.43% 0xffffffff8de01087 perf annotate: Toggle full address <-> offset display - Add 'f' hotkey to the 'perf annotate' TUI interface when in 'disassembler output' mode ('o' hotkey) to toggle showing full virtual address or just the offset. - Cache DSO build-ids when synthesizing PERF_RECORD_MMAP records for pre-existing threads, at the start of a 'perf record' session, speeding up that record startup phase. - Add a command line option to specify build ids in 'perf inject'. - Update JSON event files for the Intel alderlake, broadwell, broadwellde, broadwellx, cascadelakex, haswell, haswellx, icelake, icelakex, ivybridge, ivytown, jaketown, sandybridge, sapphirerapids, skylake, skylakex, and tigerlake processors. - Update vendor JSON event files for the ARM Neoverse V1 and E1 platforms. - Add a 'perf test' entry for 'perf mem' where a struct has false sharing and this gets detected in the 'perf mem' output, tested with Intel, AMD and ARM64 systems. - Add a 'perf test' entry to test the resolution of java symbols, where an output like this is expected: 8.18% jshell jitted-50116-29.so [.] Interpreter 0.75% Thread-1 jitted-83602-1670.so [.] jdk.internal.jimage.BasicImageReader.getString(int) - Add tests for the ARM64 CoreSight hardware tracing feature, with specially crafted pureloop, memcpy, thread loop and unroll tread that then gets traced and the output compared with expected output. Documentation explaining it is also included. - Add per thread Intel PT 'perf test' entry to check that PERF_RECORD_TEXT_POKE events are recorded per CPU, resulting in a mixture of per thread and per CPU events and mmaps, verify that this gets all recorded correctly. - Introduce pthread mutex wrappers to allow for building with clang's -Wthread-safety, i.e. using the "guarded_by" "pt_guarded_by" "lockable", "exclusive_lock_function", "exclusive_trylock_function", "exclusive_locks_required", and "no_thread_safety_analysis" compiler function attributes. - Fix empty version number when building outside of a git repo. - Improve feature detection display when multiple versions of a feature are present, such as for binutils libbfd, that has a mix of possible ways to detect according to the Linux distribution. Previously in some cases we had: Auto-detecting system features <SNIP> ... libbfd: [ on ] ... libbfd-liberty: [ on ] ... libbfd-liberty-z: [ on ] <SNIP> Now for this case we show just the main feature: Auto-detecting system features <SNIP> ... libbfd: [ on ] <SNIP> - Remove some unused structs, variables, macros, function prototypes and includes from various places. * tag 'perf-tools-for-v6.1-1-2022-10-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (169 commits) perf script: Add missing fields in usage hint perf mem: Print "LFB/MAB" for PERF_MEM_LVLNUM_LFB perf mem/c2c: Avoid printing empty lines for unsupported events perf mem/c2c: Add load store event mappings for AMD perf mem/c2c: Set PERF_SAMPLE_WEIGHT for LOAD_STORE events perf mem: Add support for printing PERF_MEM_LVLNUM_{CXL|IO} perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the kernel tools headers UAPI: Sync include/uapi/linux/perf_event.h header with the kernel perf stat: Fix cpu check to use id.cpu.cpu in aggr_printout() perf test coresight: Add relevant documentation about ARM64 CoreSight testing perf test: Add git ignore for tmp and output files of ARM CoreSight tests perf test coresight: Add unroll thread test shell script perf test coresight: Add unroll thread test tool perf test coresight: Add thread loop test shell scripts perf test coresight: Add thread loop test tool perf test coresight: Add memcpy thread test shell script perf test coresight: Add memcpy thread test tool perf test: Add git ignore for perf data generated by the ARM CoreSight tests perf test: Add arm64 asm pureloop test shell script perf test: Add asm pureloop test tool ...
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‎Documentation/trace/coresight/coresight-perf.rst

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.. SPDX-License-Identifier: GPL-2.0
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================
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CoreSight - Perf
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================
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:Author: Carsten Haitzler <[email protected]>
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:Date: June 29th, 2022
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Perf is able to locally access CoreSight trace data and store it to the
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output perf data files. This data can then be later decoded to give the
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instructions that were traced for debugging or profiling purposes. You
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can log such data with a perf record command like::
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perf record -e cs_etm//u testbinary
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This would run some test binary (testbinary) until it exits and record
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a perf.data trace file. That file would have AUX sections if CoreSight
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is working correctly. You can dump the content of this file as
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readable text with a command like::
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perf report --stdio --dump -i perf.data
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You should find some sections of this file have AUX data blocks like::
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0x1e78 [0x30]: PERF_RECORD_AUXTRACE size: 0x11dd0 offset: 0 ref: 0x1b614fc1061b0ad1 idx: 0 tid: 531230 cpu: -1
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. ... CoreSight ETM Trace data: size 73168 bytes
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Idx:0; ID:10; I_ASYNC : Alignment Synchronisation.
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Idx:12; ID:10; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 }
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Idx:17; ID:10; I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.; Addr=0x0000000000000000;
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Idx:26; ID:10; I_TRACE_ON : Trace On.
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Idx:27; ID:10; I_ADDR_CTXT_L_64IS0 : Address & Context, Long, 64 bit, IS0.; Addr=0x0000FFFFB6069140; Ctxt: AArch64,EL0, NS;
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Idx:38; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE
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Idx:39; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE
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Idx:40; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE
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Idx:41; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEN
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...
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If you see these above, then your system is tracing CoreSight data
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correctly.
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To compile perf with CoreSight support in the tools/perf directory do::
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make CORESIGHT=1
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This requires OpenCSD to build. You may install distribution packages
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for the support such as libopencsd and libopencsd-dev or download it
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and build yourself. Upstream OpenCSD is located at:
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https://github.com/Linaro/OpenCSD
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For complete information on building perf with CoreSight support and
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more extensive usage look at:
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https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md
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Kernel CoreSight Support
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------------------------
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You will also want CoreSight support enabled in your kernel config.
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Ensure it is enabled with::
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CONFIG_CORESIGHT=y
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There are various other CoreSight options you probably also want
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enabled like::
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CONFIG_CORESIGHT_LINKS_AND_SINKS=y
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CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
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CONFIG_CORESIGHT_CATU=y
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CONFIG_CORESIGHT_SINK_TPIU=y
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CONFIG_CORESIGHT_SINK_ETBV10=y
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CONFIG_CORESIGHT_SOURCE_ETM4X=y
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CONFIG_CORESIGHT_CTI=y
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CONFIG_CORESIGHT_CTI_INTEGRATION_REGS=y
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Please refer to the kernel configuration help for more information.
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Perf test - Verify kernel and userspace perf CoreSight work
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-----------------------------------------------------------
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When you run perf test, it will do a lot of self tests. Some of those
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tests will cover CoreSight (only if enabled and on ARM64). You
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generally would run perf test from the tools/perf directory in the
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kernel tree. Some tests will check some internal perf support like:
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Check Arm CoreSight trace data recording and synthesized samples
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Check Arm SPE trace data recording and synthesized samples
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Some others will actually use perf record and some test binaries that
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are in tests/shell/coresight and will collect traces to ensure a
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minimum level of functionality is met. The scripts that launch these
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tests are in the same directory. These will all look like:
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CoreSight / ASM Pure Loop
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CoreSight / Memcpy 16k 10 Threads
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CoreSight / Thread Loop 10 Threads - Check TID
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etc.
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These perf record tests will not run if the tool binaries do not exist
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in tests/shell/coresight/\*/ and will be skipped. If you do not have
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CoreSight support in hardware then either do not build perf with
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CoreSight support or remove these binaries in order to not have these
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tests fail and have them skip instead.
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These tests will log historical results in the current working
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directory (e.g. tools/perf) and will be named stats-\*.csv like:
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stats-asm_pure_loop-out.csv
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stats-memcpy_thread-16k_10.csv
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...
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These statistic files log some aspects of the AUX data sections in
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the perf data output counting some numbers of certain encodings (a
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good way to know that it's working in a very simple way). One problem
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with CoreSight is that given a large enough amount of data needing to
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be logged, some of it can be lost due to the processor not waking up
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in time to read out all the data from buffers etc.. You will notice
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that the amount of data collected can vary a lot per run of perf test.
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If you wish to see how this changes over time, simply run perf test
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multiple times and all these csv files will have more and more data
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appended to it that you can later examine, graph and otherwise use to
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figure out if things have become worse or better.
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This means sometimes these tests fail as they don't capture all the
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data needed. This is about tracking quality and amount of data
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produced over time and to see when changes to the Linux kernel improve
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quality of traces.
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Be aware that some of these tests take quite a while to run, specifically
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in processing the perf data file and dumping contents to then examine what
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is inside.
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You can change where these csv logs are stored by setting the
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PERF_TEST_CORESIGHT_STATDIR environment variable before running perf
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test like::
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export PERF_TEST_CORESIGHT_STATDIR=/var/tmp
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perf test
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They will also store resulting perf output data in the current
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directory for later inspection like::
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perf-asm_pure_loop-out.data
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perf-memcpy_thread-16k_10.data
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...
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You can alter where the perf data files are stored by setting the
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PERF_TEST_CORESIGHT_DATADIR environment variable such as::
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PERF_TEST_CORESIGHT_DATADIR=/var/tmp
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perf test
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You may wish to set these above environment variables if you wish to
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keep the output of tests outside of the current working directory for
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longer term storage and examination.

‎MAINTAINERS

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@@ -2067,6 +2067,7 @@ F: drivers/hwtracing/coresight/*
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F: include/dt-bindings/arm/coresight-cti-dt.h
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F: include/linux/coresight*
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F: samples/coresight/*
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F: tools/perf/tests/shell/coresight/*
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F: tools/perf/arch/arm/util/auxtrace.c
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F: tools/perf/arch/arm/util/cs-etm.c
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F: tools/perf/arch/arm/util/cs-etm.h

‎tools/arch/x86/include/asm/amd-ibs.h

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#include "msr-index.h"
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/* IBS_OP_DATA2 DataSrc */
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#define IBS_DATA_SRC_LOC_CACHE 2
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#define IBS_DATA_SRC_DRAM 3
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#define IBS_DATA_SRC_REM_CACHE 4
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#define IBS_DATA_SRC_IO 7
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/* IBS_OP_DATA2 DataSrc Extension */
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#define IBS_DATA_SRC_EXT_LOC_CACHE 1
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#define IBS_DATA_SRC_EXT_NEAR_CCX_CACHE 2
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#define IBS_DATA_SRC_EXT_DRAM 3
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#define IBS_DATA_SRC_EXT_FAR_CCX_CACHE 5
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#define IBS_DATA_SRC_EXT_PMEM 6
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#define IBS_DATA_SRC_EXT_IO 7
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#define IBS_DATA_SRC_EXT_EXT_MEM 8
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#define IBS_DATA_SRC_EXT_PEER_AGENT_MEM 12
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/*
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* IBS Hardware MSRs
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*/

‎tools/build/Makefile.feature

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libaio \
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libzstd
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#
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# Declare group members of a feature to display the logical OR of the detection
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# result instead of each member result.
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#
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FEATURE_GROUP_MEMBERS-libbfd = libbfd-liberty libbfd-liberty-z
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# Set FEATURE_CHECK_(C|LD)FLAGS-all for all FEATURE_TESTS features.
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# If in the future we need per-feature checks/flags for features not
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# mentioned in this list we need to refactor this ;-).
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#
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# Print the result of the feature test:
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#
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feature_print_status = $(eval $(feature_print_status_code)) $(info $(MSG))
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feature_print_status = $(eval $(feature_print_status_code))
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feature_group = $(eval $(feature_gen_group)) $(GROUP)
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define feature_gen_group
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GROUP := $(1)
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ifneq ($(feature_verbose),1)
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GROUP += $(FEATURE_GROUP_MEMBERS-$(1))
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endif
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endef
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define feature_print_status_code
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ifeq ($(feature-$(1)), 1)
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MSG = $(shell printf '...%30s: [ \033[32mon\033[m ]' $(1))
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ifneq (,$(filter 1,$(foreach feat,$(call feature_group,$(feat)),$(feature-$(feat)))))
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MSG = $(shell printf '...%40s: [ \033[32mon\033[m ]' $(1))
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else
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MSG = $(shell printf '...%30s: [ \033[31mOFF\033[m ]' $(1))
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MSG = $(shell printf '...%40s: [ \033[31mOFF\033[m ]' $(1))
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endif
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endef
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feature_print_text = $(eval $(feature_print_text_code)) $(info $(MSG))
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feature_print_text = $(eval $(feature_print_text_code))
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define feature_print_text_code
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MSG = $(shell printf '...%30s: %s' $(1) $(2))
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MSG = $(shell printf '...%40s: %s' $(1) $(2))
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endef
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#
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feature_verbose := 1
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endif
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ifneq ($(feature_verbose),1)
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#
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# Determine the features to omit from the displayed message, as only the
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# logical OR of the detection result will be shown.
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#
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FEATURE_OMIT := $(foreach feat,$(FEATURE_DISPLAY),$(FEATURE_GROUP_MEMBERS-$(feat)))
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endif
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feature_display_entries = $(eval $(feature_display_entries_code))
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define feature_display_entries_code
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ifeq ($(feature_display),1)
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$(info )
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$(info Auto-detecting system features:)
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$(foreach feat,$(FEATURE_DISPLAY),$(call feature_print_status,$(feat),))
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ifneq ($(feature_verbose),1)
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$(info )
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endif
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$$(info )
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$$(info Auto-detecting system features:)
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$(foreach feat,$(filter-out $(FEATURE_OMIT),$(FEATURE_DISPLAY)),$(call feature_print_status,$(feat),) $$(info $(MSG)))
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endif
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ifeq ($(feature_verbose),1)
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TMP := $(filter-out $(FEATURE_DISPLAY),$(FEATURE_TESTS))
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$(foreach feat,$(TMP),$(call feature_print_status,$(feat),))
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$(info )
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$(eval TMP := $(filter-out $(FEATURE_DISPLAY),$(FEATURE_TESTS)))
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$(foreach feat,$(TMP),$(call feature_print_status,$(feat),) $$(info $(MSG)))
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endif
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endef
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ifeq ($(FEATURE_DISPLAY_DEFERRED),)
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$(call feature_display_entries)
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$(info )
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endif

‎tools/include/uapi/linux/perf_event.h

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PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT = 17, /* save low level index of raw branch records */
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PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT = 18, /* save privilege mode */
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PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */
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};
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PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
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PERF_SAMPLE_BRANCH_PRIV_SAVE = 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT,
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PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
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};
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PERF_BR_COND_RET = 10, /* conditional function return */
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PERF_BR_ERET = 11, /* exception return */
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PERF_BR_IRQ = 12, /* irq */
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PERF_BR_SERROR = 13, /* system error */
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PERF_BR_NO_TX = 14, /* not in transaction */
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PERF_BR_EXTEND_ABI = 15, /* extend ABI */
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PERF_BR_MAX,
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};
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enum {
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PERF_BR_NEW_FAULT_ALGN = 0, /* Alignment fault */
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PERF_BR_NEW_FAULT_DATA = 1, /* Data fault */
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PERF_BR_NEW_FAULT_INST = 2, /* Inst fault */
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PERF_BR_NEW_ARCH_1 = 3, /* Architecture specific */
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PERF_BR_NEW_ARCH_2 = 4, /* Architecture specific */
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PERF_BR_NEW_ARCH_3 = 5, /* Architecture specific */
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PERF_BR_NEW_ARCH_4 = 6, /* Architecture specific */
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PERF_BR_NEW_ARCH_5 = 7, /* Architecture specific */
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PERF_BR_NEW_MAX,
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};
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enum {
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PERF_BR_PRIV_UNKNOWN = 0,
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PERF_BR_PRIV_USER = 1,
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PERF_BR_PRIV_KERNEL = 2,
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PERF_BR_PRIV_HV = 3,
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};
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#define PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1
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#define PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2
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#define PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3
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#define PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4
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#define PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5
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#define PERF_SAMPLE_BRANCH_PLM_ALL \
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(PERF_SAMPLE_BRANCH_USER|\
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PERF_SAMPLE_BRANCH_KERNEL|\
@@ -1295,7 +1327,9 @@ union perf_mem_data_src {
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#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */
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#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */
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#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */
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/* 5-0xa available */
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/* 5-0x8 available */
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#define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */
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#define PERF_MEM_LVLNUM_IO 0x0a /* I/O */
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#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
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#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */
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#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */
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abort:1, /* transaction abort */
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cycles:16, /* cycle count to last branch */
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type:4, /* branch type */
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reserved:40;
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new_type:4, /* additional branch type */
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priv:3, /* privilege level */
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reserved:33;
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};
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13791415
union perf_sample_weight {

‎tools/lib/api/fd/array.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,9 @@ struct fdarray {
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};
3232

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enum fdarray_flags {
34-
fdarray_flag__default = 0x00000000,
35-
fdarray_flag__nonfilterable = 0x00000001
34+
fdarray_flag__default = 0x00000000,
35+
fdarray_flag__nonfilterable = 0x00000001,
36+
fdarray_flag__non_perf_event = 0x00000002,
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};
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void fdarray__init(struct fdarray *fda, int nr_autogrow);

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