@@ -872,30 +872,117 @@ __cpuinit int unsynchronized_tsc(void)
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if (boot_cpu_has (X86_FEATURE_CONSTANT_TSC ))
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return 0 ;
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+
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+ if (tsc_clocksource_reliable )
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+ return 0 ;
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/*
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* Intel systems are normally all synchronized.
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* Exceptions must mark TSC as unstable:
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*/
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if (boot_cpu_data .x86_vendor != X86_VENDOR_INTEL ) {
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/* assume multi socket systems are not synchronized: */
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if (num_possible_cpus () > 1 )
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- tsc_unstable = 1 ;
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+ return 1 ;
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}
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- return tsc_unstable ;
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+ return 0 ;
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+ }
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+
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+
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+ static void tsc_refine_calibration_work (struct work_struct * work );
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+ static DECLARE_DELAYED_WORK (tsc_irqwork , tsc_refine_calibration_work ) ;
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+ /**
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+ * tsc_refine_calibration_work - Further refine tsc freq calibration
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+ * @work - ignored.
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+ *
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+ * This functions uses delayed work over a period of a
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+ * second to further refine the TSC freq value. Since this is
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+ * timer based, instead of loop based, we don't block the boot
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+ * process while this longer calibration is done.
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+ *
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+ * If there are any calibration anomolies (too many SMIs, etc),
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+ * or the refined calibration is off by 1% of the fast early
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+ * calibration, we throw out the new calibration and use the
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+ * early calibration.
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+ */
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+ static void tsc_refine_calibration_work (struct work_struct * work )
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+ {
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+ static u64 tsc_start = -1 , ref_start ;
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+ static int hpet ;
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+ u64 tsc_stop , ref_stop , delta ;
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+ unsigned long freq ;
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+
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+ /* Don't bother refining TSC on unstable systems */
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+ if (check_tsc_unstable ())
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+ goto out ;
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+
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+ /*
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+ * Since the work is started early in boot, we may be
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+ * delayed the first time we expire. So set the workqueue
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+ * again once we know timers are working.
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+ */
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+ if (tsc_start == -1 ) {
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+ /*
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+ * Only set hpet once, to avoid mixing hardware
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+ * if the hpet becomes enabled later.
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+ */
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+ hpet = is_hpet_enabled ();
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+ schedule_delayed_work (& tsc_irqwork , HZ );
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+ tsc_start = tsc_read_refs (& ref_start , hpet );
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+ return ;
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+ }
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+
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+ tsc_stop = tsc_read_refs (& ref_stop , hpet );
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+
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+ /* hpet or pmtimer available ? */
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+ if (!hpet && !ref_start && !ref_stop )
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+ goto out ;
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+
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+ /* Check, whether the sampling was disturbed by an SMI */
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+ if (tsc_start == ULLONG_MAX || tsc_stop == ULLONG_MAX )
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+ goto out ;
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+
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+ delta = tsc_stop - tsc_start ;
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+ delta *= 1000000LL ;
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+ if (hpet )
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+ freq = calc_hpet_ref (delta , ref_start , ref_stop );
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+ else
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+ freq = calc_pmtimer_ref (delta , ref_start , ref_stop );
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+
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+ /* Make sure we're within 1% */
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+ if (abs (tsc_khz - freq ) > tsc_khz /100 )
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+ goto out ;
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+
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+ tsc_khz = freq ;
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+ printk (KERN_INFO "Refined TSC clocksource calibration: "
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+ "%lu.%03lu MHz.\n" , (unsigned long )tsc_khz / 1000 ,
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+ (unsigned long )tsc_khz % 1000 );
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+
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+ out :
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+ clocksource_register_khz (& clocksource_tsc , tsc_khz );
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}
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- static void __init init_tsc_clocksource (void )
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+
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+ static int __init init_tsc_clocksource (void )
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{
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+ if (!cpu_has_tsc || tsc_disabled > 0 )
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+ return 0 ;
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+
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if (tsc_clocksource_reliable )
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clocksource_tsc .flags &= ~CLOCK_SOURCE_MUST_VERIFY ;
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/* lower the rating if we already know its unstable: */
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if (check_tsc_unstable ()) {
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clocksource_tsc .rating = 0 ;
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clocksource_tsc .flags &= ~CLOCK_SOURCE_IS_CONTINUOUS ;
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}
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- clocksource_register_khz (& clocksource_tsc , tsc_khz );
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+ schedule_delayed_work (& tsc_irqwork , 0 );
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+ return 0 ;
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}
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+ /*
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+ * We use device_initcall here, to ensure we run after the hpet
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+ * is fully initialized, which may occur at fs_initcall time.
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+ */
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+ device_initcall (init_tsc_clocksource );
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void __init tsc_init (void )
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{
@@ -949,6 +1036,5 @@ void __init tsc_init(void)
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mark_tsc_unstable ("TSCs unsynchronized" );
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check_system_tsc_reliable ();
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- init_tsc_clocksource ();
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}
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