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Marek Olšákalexdeucher
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Revert "drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)"
This reverts commit 9ed2c99. SET_CONFIG_REG writes to memory if register shadowing is enabled, causing a VM fault. NGG streamout is unstable anyway, so all UMDs should use legacy streamout. I think Mesa is the only driver using NGG streamout. Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h

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Original file line numberDiff line numberDiff line change
@@ -32,7 +32,6 @@ struct amdgpu_gds {
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uint32_t gws_size;
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uint32_t oa_size;
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uint32_t gds_compute_max_wave_id;
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uint32_t vgt_gs_max_wave_id;
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};
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struct amdgpu_gds_reg_offset {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4206,15 +4206,6 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
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unsigned vmid = AMDGPU_JOB_GET_VMID(job);
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u32 header, control = 0;
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/* Prevent a hw deadlock due to a wave ID mismatch between ME and GDS.
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* This resets the wave ID counters. (needed by transform feedback)
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* TODO: This might only be needed on a VMID switch when we change
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* the GDS OA mapping, not sure.
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*/
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amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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amdgpu_ring_write(ring, mmVGT_GS_MAX_WAVE_ID);
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amdgpu_ring_write(ring, ring->adev->gds.vgt_gs_max_wave_id);
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if (ib->flags & AMDGPU_IB_FLAG_CE)
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header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2);
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else
@@ -4961,7 +4952,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = {
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5 + /* HDP_INVL */
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8 + 8 + /* FENCE x2 */
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2, /* SWITCH_BUFFER */
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.emit_ib_size = 7, /* gfx_v10_0_ring_emit_ib_gfx */
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.emit_ib_size = 4, /* gfx_v10_0_ring_emit_ib_gfx */
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.emit_ib = gfx_v10_0_ring_emit_ib_gfx,
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.emit_fence = gfx_v10_0_ring_emit_fence,
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.emit_pipeline_sync = gfx_v10_0_ring_emit_pipeline_sync,
@@ -5112,7 +5103,6 @@ static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev)
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default:
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adev->gds.gds_size = 0x10000;
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adev->gds.gds_compute_max_wave_id = 0x4ff;
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adev->gds.vgt_gs_max_wave_id = 0x3ff;
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break;
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}
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