dmaengine: altera: fix response FIFO emptying

Commit 6084fc2 ("dmaengine: altera: Use macros instead of structs
to describe the registers") introduced a minus sign before a register
offset.

This leads to soft-locks of the DMA controller, since reading the last
status byte is required to pop the response from the FIFO. Failing to
do so will lead to a full FIFO, which means that the DMA controller
will stop processing descriptors.

Signed-off-by: Sylvain Lesne <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>

Author: SylvainLesne

drivers/dma/altera-msgdma.c

@@ -698,7 +698,7 @@ static void msgdma_tasklet(unsigned long data)
 		 * bits. So we need to just drop these values.
 		 */
 		size = ioread32(mdev->resp + MSGDMA_RESP_BYTES_TRANSFERRED);
-		status = ioread32(mdev->resp - MSGDMA_RESP_STATUS);
+		status = ioread32(mdev->resp + MSGDMA_RESP_STATUS);
 
 		msgdma_complete_descriptor(mdev);
 		msgdma_chan_desc_cleanup(mdev);