|
| 1 | +/* |
| 2 | + * Support for indirect PCI bridges. |
| 3 | + * |
| 4 | + * Copyright (C) 1998 Gabriel Paubert. |
| 5 | + * |
| 6 | + * This program is free software; you can redistribute it and/or |
| 7 | + * modify it under the terms of the GNU General Public License |
| 8 | + * as published by the Free Software Foundation; either version |
| 9 | + * 2 of the License, or (at your option) any later version. |
| 10 | + */ |
| 11 | + |
| 12 | +#include <linux/kernel.h> |
| 13 | +#include <linux/pci.h> |
| 14 | +#include <linux/delay.h> |
| 15 | +#include <linux/string.h> |
| 16 | +#include <linux/init.h> |
| 17 | + |
| 18 | +#include <asm/io.h> |
| 19 | +#include <asm/prom.h> |
| 20 | +#include <asm/pci-bridge.h> |
| 21 | +#include <asm/machdep.h> |
| 22 | + |
| 23 | +#ifdef CONFIG_PPC_INDIRECT_PCI_BE |
| 24 | +#define PCI_CFG_OUT out_be32 |
| 25 | +#else |
| 26 | +#define PCI_CFG_OUT out_le32 |
| 27 | +#endif |
| 28 | + |
| 29 | +static int |
| 30 | +indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, |
| 31 | + int len, u32 *val) |
| 32 | +{ |
| 33 | + struct pci_controller *hose = bus->sysdata; |
| 34 | + volatile void __iomem *cfg_data; |
| 35 | + u8 cfg_type = 0; |
| 36 | + |
| 37 | + if (ppc_md.pci_exclude_device) |
| 38 | + if (ppc_md.pci_exclude_device(bus->number, devfn)) |
| 39 | + return PCIBIOS_DEVICE_NOT_FOUND; |
| 40 | + |
| 41 | + if (hose->set_cfg_type) |
| 42 | + if (bus->number != hose->first_busno) |
| 43 | + cfg_type = 1; |
| 44 | + |
| 45 | + PCI_CFG_OUT(hose->cfg_addr, |
| 46 | + (0x80000000 | ((bus->number - hose->bus_offset) << 16) |
| 47 | + | (devfn << 8) | ((offset & 0xfc) | cfg_type))); |
| 48 | + |
| 49 | + /* |
| 50 | + * Note: the caller has already checked that offset is |
| 51 | + * suitably aligned and that len is 1, 2 or 4. |
| 52 | + */ |
| 53 | + cfg_data = hose->cfg_data + (offset & 3); |
| 54 | + switch (len) { |
| 55 | + case 1: |
| 56 | + *val = in_8(cfg_data); |
| 57 | + break; |
| 58 | + case 2: |
| 59 | + *val = in_le16(cfg_data); |
| 60 | + break; |
| 61 | + default: |
| 62 | + *val = in_le32(cfg_data); |
| 63 | + break; |
| 64 | + } |
| 65 | + return PCIBIOS_SUCCESSFUL; |
| 66 | +} |
| 67 | + |
| 68 | +static int |
| 69 | +indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, |
| 70 | + int len, u32 val) |
| 71 | +{ |
| 72 | + struct pci_controller *hose = bus->sysdata; |
| 73 | + volatile void __iomem *cfg_data; |
| 74 | + u8 cfg_type = 0; |
| 75 | + |
| 76 | + if (ppc_md.pci_exclude_device) |
| 77 | + if (ppc_md.pci_exclude_device(bus->number, devfn)) |
| 78 | + return PCIBIOS_DEVICE_NOT_FOUND; |
| 79 | + |
| 80 | + if (hose->set_cfg_type) |
| 81 | + if (bus->number != hose->first_busno) |
| 82 | + cfg_type = 1; |
| 83 | + |
| 84 | + PCI_CFG_OUT(hose->cfg_addr, |
| 85 | + (0x80000000 | ((bus->number - hose->bus_offset) << 16) |
| 86 | + | (devfn << 8) | ((offset & 0xfc) | cfg_type))); |
| 87 | + |
| 88 | + /* |
| 89 | + * Note: the caller has already checked that offset is |
| 90 | + * suitably aligned and that len is 1, 2 or 4. |
| 91 | + */ |
| 92 | + cfg_data = hose->cfg_data + (offset & 3); |
| 93 | + switch (len) { |
| 94 | + case 1: |
| 95 | + out_8(cfg_data, val); |
| 96 | + break; |
| 97 | + case 2: |
| 98 | + out_le16(cfg_data, val); |
| 99 | + break; |
| 100 | + default: |
| 101 | + out_le32(cfg_data, val); |
| 102 | + break; |
| 103 | + } |
| 104 | + return PCIBIOS_SUCCESSFUL; |
| 105 | +} |
| 106 | + |
| 107 | +static struct pci_ops indirect_pci_ops = |
| 108 | +{ |
| 109 | + indirect_read_config, |
| 110 | + indirect_write_config |
| 111 | +}; |
| 112 | + |
| 113 | +void __init |
| 114 | +setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr, |
| 115 | + void __iomem * cfg_data) |
| 116 | +{ |
| 117 | + hose->cfg_addr = cfg_addr; |
| 118 | + hose->cfg_data = cfg_data; |
| 119 | + hose->ops = &indirect_pci_ops; |
| 120 | +} |
| 121 | + |
| 122 | +void __init |
| 123 | +setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) |
| 124 | +{ |
| 125 | + unsigned long base = cfg_addr & PAGE_MASK; |
| 126 | + void __iomem *mbase, *addr, *data; |
| 127 | + |
| 128 | + mbase = ioremap(base, PAGE_SIZE); |
| 129 | + addr = mbase + (cfg_addr & ~PAGE_MASK); |
| 130 | + if ((cfg_data & PAGE_MASK) != base) |
| 131 | + mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); |
| 132 | + data = mbase + (cfg_data & ~PAGE_MASK); |
| 133 | + setup_indirect_pci_nomap(hose, addr, data); |
| 134 | +} |
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