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davem330davem330
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Merge branch 'r8169-enable-ASPM-on-RTL8168E-VL'
Heiner Kallweit says: ==================== r8169: enable ASPM on RTL8168E-VL This patch series enables ASPM for the RTL8168E-VL and aligns ASPM entry latency handling with the vendor driver before. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents a055b02 + aa1e7d2 commit dd55c4e

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1 file changed

+21
-24
lines changed
  • drivers/net/ethernet/realtek

1 file changed

+21
-24
lines changed

‎drivers/net/ethernet/realtek/r8169.c

Lines changed: 21 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -5235,12 +5235,7 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val)
52355235
rtl_csi_write(tp, 0x070c, csi | val << 24);
52365236
}
52375237

5238-
static void rtl_csi_access_enable_1(struct rtl8169_private *tp)
5239-
{
5240-
rtl_csi_access_enable(tp, 0x17);
5241-
}
5242-
5243-
static void rtl_csi_access_enable_2(struct rtl8169_private *tp)
5238+
static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp)
52445239
{
52455240
rtl_csi_access_enable(tp, 0x27);
52465241
}
@@ -5347,7 +5342,7 @@ static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
53475342
{ 0x07, 0, 0x2000 }
53485343
};
53495344

5350-
rtl_csi_access_enable_2(tp);
5345+
rtl_set_def_aspm_entry_latency(tp);
53515346

53525347
rtl_ephy_init(tp, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
53535348

@@ -5356,7 +5351,7 @@ static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
53565351

53575352
static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
53585353
{
5359-
rtl_csi_access_enable_2(tp);
5354+
rtl_set_def_aspm_entry_latency(tp);
53605355

53615356
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
53625357

@@ -5369,7 +5364,7 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
53695364

53705365
static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
53715366
{
5372-
rtl_csi_access_enable_2(tp);
5367+
rtl_set_def_aspm_entry_latency(tp);
53735368

53745369
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
53755370

@@ -5393,7 +5388,7 @@ static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)
53935388
{ 0x06, 0x0080, 0x0000 }
53945389
};
53955390

5396-
rtl_csi_access_enable_2(tp);
5391+
rtl_set_def_aspm_entry_latency(tp);
53975392

53985393
RTL_W8(tp, DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
53995394

@@ -5409,7 +5404,7 @@ static void rtl_hw_start_8168c_2(struct rtl8169_private *tp)
54095404
{ 0x03, 0x0400, 0x0220 }
54105405
};
54115406

5412-
rtl_csi_access_enable_2(tp);
5407+
rtl_set_def_aspm_entry_latency(tp);
54135408

54145409
rtl_ephy_init(tp, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
54155410

@@ -5423,14 +5418,14 @@ static void rtl_hw_start_8168c_3(struct rtl8169_private *tp)
54235418

54245419
static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)
54255420
{
5426-
rtl_csi_access_enable_2(tp);
5421+
rtl_set_def_aspm_entry_latency(tp);
54275422

54285423
__rtl_hw_start_8168cp(tp);
54295424
}
54305425

54315426
static void rtl_hw_start_8168d(struct rtl8169_private *tp)
54325427
{
5433-
rtl_csi_access_enable_2(tp);
5428+
rtl_set_def_aspm_entry_latency(tp);
54345429

54355430
rtl_disable_clock_request(tp);
54365431

@@ -5445,7 +5440,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp)
54455440

54465441
static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
54475442
{
5448-
rtl_csi_access_enable_1(tp);
5443+
rtl_set_def_aspm_entry_latency(tp);
54495444

54505445
if (tp->dev->mtu <= ETH_DATA_LEN)
54515446
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
@@ -5463,7 +5458,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
54635458
{ 0x0c, 0x0100, 0x0020 }
54645459
};
54655460

5466-
rtl_csi_access_enable_1(tp);
5461+
rtl_set_def_aspm_entry_latency(tp);
54675462

54685463
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
54695464

@@ -5492,7 +5487,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
54925487
{ 0x0a, 0x0000, 0x0040 }
54935488
};
54945489

5495-
rtl_csi_access_enable_2(tp);
5490+
rtl_set_def_aspm_entry_latency(tp);
54965491

54975492
rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
54985493

@@ -5517,7 +5512,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
55175512
{ 0x19, 0x0000, 0x0224 }
55185513
};
55195514

5520-
rtl_csi_access_enable_1(tp);
5515+
rtl_set_def_aspm_entry_latency(tp);
55215516

55225517
rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
55235518

@@ -5546,11 +5541,13 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
55465541
RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);
55475542
RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);
55485543
RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);
5544+
5545+
rtl_hw_aspm_clkreq_enable(tp, true);
55495546
}
55505547

55515548
static void rtl_hw_start_8168f(struct rtl8169_private *tp)
55525549
{
5553-
rtl_csi_access_enable_2(tp);
5550+
rtl_set_def_aspm_entry_latency(tp);
55545551

55555552
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
55565553

@@ -5621,7 +5618,7 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp)
56215618
rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
56225619
rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
56235620

5624-
rtl_csi_access_enable_1(tp);
5621+
rtl_set_def_aspm_entry_latency(tp);
56255622

56265623
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
56275624

@@ -5720,7 +5717,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
57205717
rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
57215718
rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
57225719

5723-
rtl_csi_access_enable_1(tp);
5720+
rtl_set_def_aspm_entry_latency(tp);
57245721

57255722
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
57265723

@@ -5804,7 +5801,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
58045801
rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x5f, ERIAR_EXGMAC);
58055802
rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
58065803

5807-
rtl_csi_access_enable_1(tp);
5804+
rtl_set_def_aspm_entry_latency(tp);
58085805

58095806
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
58105807

@@ -6040,7 +6037,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
60406037
};
60416038
u8 cfg1;
60426039

6043-
rtl_csi_access_enable_2(tp);
6040+
rtl_set_def_aspm_entry_latency(tp);
60446041

60456042
RTL_W8(tp, DBG_REG, FIX_NAK_1);
60466043

@@ -6059,7 +6056,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
60596056

60606057
static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
60616058
{
6062-
rtl_csi_access_enable_2(tp);
6059+
rtl_set_def_aspm_entry_latency(tp);
60636060

60646061
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
60656062

@@ -6114,7 +6111,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
61146111
{ 0x1e, 0, 0x4000 }
61156112
};
61166113

6117-
rtl_csi_access_enable_2(tp);
6114+
rtl_set_def_aspm_entry_latency(tp);
61186115

61196116
/* Force LAN exit from ASPM if Rx/Tx are not idle */
61206117
RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);

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