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cxl/region: Fix 'distance' calculation with passthrough ports
When programming port decode targets, the algorithm wants to ensure that two devices are compatible to be programmed as peers beneath a given port. A compatible peer is a target that shares the same dport, and where that target's interleave position also routes it to the same dport. Compatibility is determined by the device's interleave position being >= to distance. For example, if a given dport can only map every Nth position then positions less than N away from the last target programmed are incompatible. The @distance for the host-bridge's cxl_port in a simple dual-ported host-bridge configuration with 2 direct-attached devices is 1, i.e. An x2 region divided by 2 dports to reach 2 region targets. An x4 region under an x2 host-bridge would need 2 intervening switches where the @distance at the host bridge level is 2 (x4 region divided by 2 switches to reach 4 devices). However, the distance between peers underneath a single ported host-bridge is always zero because there is no limit to the number of devices that can be mapped. In other words, there are no decoders to program in a passthrough, all descendants are mapped and distance only starts matters for the intervening descendant ports of the passthrough port. Add tracking for the number of dports mapped to a port, and use that to detect the passthrough case for calculating @distance. Cc: <[email protected]> Reported-by: Bobo WL <[email protected]> Reported-by: Jonathan Cameron <[email protected]> Link: http://lore.kernel.org/r/[email protected] Fixes: 27b3f8d ("cxl/region: Program target lists") Reviewed-by: Vishal Verma <[email protected]> Link: https://lore.kernel.org/r/166752185440.947915.6617495912508299445.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <[email protected]>
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+19
-3
lines changed

3 files changed

+19
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lines changed

drivers/cxl/core/port.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -811,6 +811,7 @@ static struct cxl_dport *find_dport(struct cxl_port *port, int id)
811811
static int add_dport(struct cxl_port *port, struct cxl_dport *new)
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{
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struct cxl_dport *dup;
814+
int rc;
814815

815816
device_lock_assert(&port->dev);
816817
dup = find_dport(port, new->port_id);
@@ -821,8 +822,14 @@ static int add_dport(struct cxl_port *port, struct cxl_dport *new)
821822
dev_name(dup->dport));
822823
return -EBUSY;
823824
}
824-
return xa_insert(&port->dports, (unsigned long)new->dport, new,
825-
GFP_KERNEL);
825+
826+
rc = xa_insert(&port->dports, (unsigned long)new->dport, new,
827+
GFP_KERNEL);
828+
if (rc)
829+
return rc;
830+
831+
port->nr_dports++;
832+
return 0;
826833
}
827834

828835
/*

drivers/cxl/core/region.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -990,7 +990,14 @@ static int cxl_port_setup_targets(struct cxl_port *port,
990990
if (cxl_rr->nr_targets_set) {
991991
int i, distance;
992992

993-
distance = p->nr_targets / cxl_rr->nr_targets;
993+
/*
994+
* Passthrough ports impose no distance requirements between
995+
* peers
996+
*/
997+
if (port->nr_dports == 1)
998+
distance = 0;
999+
else
1000+
distance = p->nr_targets / cxl_rr->nr_targets;
9941001
for (i = 0; i < cxl_rr->nr_targets_set; i++)
9951002
if (ep->dport == cxlsd->target[i]) {
9961003
rc = check_last_peer(cxled, ep, cxl_rr,

drivers/cxl/cxl.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -457,6 +457,7 @@ struct cxl_pmem_region {
457457
* @regions: cxl_region_ref instances, regions mapped by this port
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* @parent_dport: dport that points to this port in the parent
459459
* @decoder_ida: allocator for decoder ids
460+
* @nr_dports: number of entries in @dports
460461
* @hdm_end: track last allocated HDM decoder instance for allocation ordering
461462
* @commit_end: cursor to track highest committed decoder for commit ordering
462463
* @component_reg_phys: component register capability base address (optional)
@@ -475,6 +476,7 @@ struct cxl_port {
475476
struct xarray regions;
476477
struct cxl_dport *parent_dport;
477478
struct ida decoder_ida;
479+
int nr_dports;
478480
int hdm_end;
479481
int commit_end;
480482
resource_size_t component_reg_phys;

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