@@ -286,7 +286,6 @@ enum rtl_registers {
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#define RXCFG_DMA_SHIFT 8
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/* Unlimited maximum PCI burst. */
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#define RX_DMA_BURST (7 << RXCFG_DMA_SHIFT )
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- #define RTL_RX_CONFIG_MASK 0xff7e1880u
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RxMissed = 0x4c ,
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Cfg9346 = 0x50 ,
@@ -728,8 +727,6 @@ static void rtl8169_down(struct net_device *dev);
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static void rtl8169_rx_clear (struct rtl8169_private * tp );
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static int rtl8169_poll (struct napi_struct * napi , int budget );
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- static const unsigned int rtl8169_rx_config = RX_FIFO_THRESH | RX_DMA_BURST ;
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-
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static u32 ocp_read (struct rtl8169_private * tp , u8 mask , u16 reg )
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{
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void __iomem * ioaddr = tp -> mmio_addr ;
@@ -3503,6 +3500,42 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
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}
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}
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+ static void rtl_init_rxcfg (struct rtl8169_private * tp )
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+ {
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+ void __iomem * ioaddr = tp -> mmio_addr ;
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+
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+ switch (tp -> mac_version ) {
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+ case RTL_GIGA_MAC_VER_01 :
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+ case RTL_GIGA_MAC_VER_02 :
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+ case RTL_GIGA_MAC_VER_03 :
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+ case RTL_GIGA_MAC_VER_04 :
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+ case RTL_GIGA_MAC_VER_05 :
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+ case RTL_GIGA_MAC_VER_06 :
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+ case RTL_GIGA_MAC_VER_10 :
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+ case RTL_GIGA_MAC_VER_11 :
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+ case RTL_GIGA_MAC_VER_12 :
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+ case RTL_GIGA_MAC_VER_13 :
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+ case RTL_GIGA_MAC_VER_14 :
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+ case RTL_GIGA_MAC_VER_15 :
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+ case RTL_GIGA_MAC_VER_16 :
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+ case RTL_GIGA_MAC_VER_17 :
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+ RTL_W32 (RxConfig , RX_FIFO_THRESH | RX_DMA_BURST );
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+ break ;
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+ case RTL_GIGA_MAC_VER_18 :
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+ case RTL_GIGA_MAC_VER_19 :
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+ case RTL_GIGA_MAC_VER_20 :
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+ case RTL_GIGA_MAC_VER_21 :
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+ case RTL_GIGA_MAC_VER_22 :
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+ case RTL_GIGA_MAC_VER_23 :
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+ case RTL_GIGA_MAC_VER_24 :
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+ RTL_W32 (RxConfig , RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST );
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+ break ;
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+ default :
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+ RTL_W32 (RxConfig , RX128_INT_EN | RX_DMA_BURST );
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+ break ;
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+ }
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+ }
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+
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static void rtl8169_init_ring_indexes (struct rtl8169_private * tp )
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{
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tp -> dirty_tx = tp -> dirty_rx = tp -> cur_tx = tp -> cur_rx = 0 ;
@@ -3630,6 +3663,11 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (!pci_is_pcie (pdev ))
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netif_info (tp , probe , dev , "not PCI Express\n" );
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+ /* Identify chip attached to board */
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+ rtl8169_get_mac_version (tp , dev , cfg -> default_ver );
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+
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+ rtl_init_rxcfg (tp );
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+
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RTL_W16 (IntrMask , 0x0000 );
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rtl_hw_reset (tp );
@@ -3638,9 +3676,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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pci_set_master (pdev );
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- /* Identify chip attached to board */
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- rtl8169_get_mac_version (tp , dev , cfg -> default_ver );
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-
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/*
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* Pretend we are using VLANs; This bypasses a nasty bug where
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* Interrupts stop flowing on high load on 8110SCd controllers.
@@ -3943,10 +3978,6 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
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static void rtl_set_rx_tx_config_registers (struct rtl8169_private * tp )
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{
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void __iomem * ioaddr = tp -> mmio_addr ;
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- u32 cfg = rtl8169_rx_config ;
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-
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- cfg |= (RTL_R32 (RxConfig ) & RTL_RX_CONFIG_MASK );
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- RTL_W32 (RxConfig , cfg );
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/* Set DMA burst size and Interframe Gap Time */
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RTL_W32 (TxConfig , (TX_DMA_BURST << TxDMAShift ) |
@@ -4034,6 +4065,8 @@ static void rtl_hw_start_8169(struct net_device *dev)
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tp -> mac_version == RTL_GIGA_MAC_VER_04 )
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RTL_W8 (ChipCmd , CmdTxEnb | CmdRxEnb );
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+ rtl_init_rxcfg (tp );
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+
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RTL_W8 (EarlyTxThres , NoEarlyTx );
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rtl_set_rx_max_size (ioaddr , rx_buf_sz );
@@ -5553,8 +5586,7 @@ static void rtl_set_rx_mode(struct net_device *dev)
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spin_lock_irqsave (& tp -> lock , flags );
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- tmp = rtl8169_rx_config | rx_mode |
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- (RTL_R32 (RxConfig ) & RTL_RX_CONFIG_MASK );
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+ tmp = RTL_R32 (RxConfig ) | rx_mode ;
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if (tp -> mac_version > RTL_GIGA_MAC_VER_06 ) {
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u32 data = mc_filter [0 ];
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