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Amit Cohendavem330
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mlxsw: Use Switch Flooding Table Register Version 2
The SFTR-V2 register is used for flooding packet replication. It is a new version of SFTR in order to support 1024 bits of local_port. Add SFTR-V2 register and use it instead of SFTR. Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Petr Machata <[email protected]> Signed-off-by: Ido Schimmel <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/ethernet/mellanox/mlxsw/reg.h

Lines changed: 71 additions & 71 deletions
Original file line numberDiff line numberDiff line change
@@ -1108,76 +1108,6 @@ mlxsw_reg_sfgc_pack(char *payload, enum mlxsw_reg_sfgc_type type,
11081108
mlxsw_reg_sfgc_mid_set(payload, MLXSW_PORT_MID);
11091109
}
11101110

1111-
/* SFTR - Switch Flooding Table Register
1112-
* -------------------------------------
1113-
* The switch flooding table is used for flooding packet replication. The table
1114-
* defines a bit mask of ports for packet replication.
1115-
*/
1116-
#define MLXSW_REG_SFTR_ID 0x2012
1117-
#define MLXSW_REG_SFTR_LEN 0x420
1118-
1119-
MLXSW_REG_DEFINE(sftr, MLXSW_REG_SFTR_ID, MLXSW_REG_SFTR_LEN);
1120-
1121-
/* reg_sftr_swid
1122-
* Switch partition ID with which to associate the port.
1123-
* Access: Index
1124-
*/
1125-
MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
1126-
1127-
/* reg_sftr_flood_table
1128-
* Flooding table index to associate with the specific type on the specific
1129-
* switch partition.
1130-
* Access: Index
1131-
*/
1132-
MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
1133-
1134-
/* reg_sftr_index
1135-
* Index. Used as an index into the Flooding Table in case the table is
1136-
* configured to use VID / FID or FID Offset.
1137-
* Access: Index
1138-
*/
1139-
MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
1140-
1141-
/* reg_sftr_table_type
1142-
* See mlxsw_flood_table_type
1143-
* Access: RW
1144-
*/
1145-
MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
1146-
1147-
/* reg_sftr_range
1148-
* Range of entries to update
1149-
* Access: Index
1150-
*/
1151-
MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
1152-
1153-
/* reg_sftr_port
1154-
* Local port membership (1 bit per port).
1155-
* Access: RW
1156-
*/
1157-
MLXSW_ITEM_BIT_ARRAY(reg, sftr, port, 0x20, 0x20, 1);
1158-
1159-
/* reg_sftr_cpu_port_mask
1160-
* CPU port mask (1 bit per port).
1161-
* Access: W
1162-
*/
1163-
MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1);
1164-
1165-
static inline void mlxsw_reg_sftr_pack(char *payload,
1166-
unsigned int flood_table,
1167-
unsigned int index,
1168-
enum mlxsw_flood_table_type table_type,
1169-
unsigned int range, u8 port, bool set)
1170-
{
1171-
MLXSW_REG_ZERO(sftr, payload);
1172-
mlxsw_reg_sftr_swid_set(payload, 0);
1173-
mlxsw_reg_sftr_flood_table_set(payload, flood_table);
1174-
mlxsw_reg_sftr_index_set(payload, index);
1175-
mlxsw_reg_sftr_table_type_set(payload, table_type);
1176-
mlxsw_reg_sftr_range_set(payload, range);
1177-
mlxsw_reg_sftr_port_set(payload, port, set);
1178-
mlxsw_reg_sftr_port_mask_set(payload, port, 1);
1179-
}
1180-
11811111
/* SFDF - Switch Filtering DB Flush
11821112
* --------------------------------
11831113
* The switch filtering DB flush register is used to flush the FDB.
@@ -2105,6 +2035,76 @@ static inline void mlxsw_reg_spevet_pack(char *payload, u16 local_port,
21052035
mlxsw_reg_spevet_et_vlan_set(payload, et_vlan);
21062036
}
21072037

2038+
/* SFTR-V2 - Switch Flooding Table Version 2 Register
2039+
* --------------------------------------------------
2040+
* The switch flooding table is used for flooding packet replication. The table
2041+
* defines a bit mask of ports for packet replication.
2042+
*/
2043+
#define MLXSW_REG_SFTR2_ID 0x202F
2044+
#define MLXSW_REG_SFTR2_LEN 0x120
2045+
2046+
MLXSW_REG_DEFINE(sftr2, MLXSW_REG_SFTR2_ID, MLXSW_REG_SFTR2_LEN);
2047+
2048+
/* reg_sftr2_swid
2049+
* Switch partition ID with which to associate the port.
2050+
* Access: Index
2051+
*/
2052+
MLXSW_ITEM32(reg, sftr2, swid, 0x00, 24, 8);
2053+
2054+
/* reg_sftr2_flood_table
2055+
* Flooding table index to associate with the specific type on the specific
2056+
* switch partition.
2057+
* Access: Index
2058+
*/
2059+
MLXSW_ITEM32(reg, sftr2, flood_table, 0x00, 16, 6);
2060+
2061+
/* reg_sftr2_index
2062+
* Index. Used as an index into the Flooding Table in case the table is
2063+
* configured to use VID / FID or FID Offset.
2064+
* Access: Index
2065+
*/
2066+
MLXSW_ITEM32(reg, sftr2, index, 0x00, 0, 16);
2067+
2068+
/* reg_sftr2_table_type
2069+
* See mlxsw_flood_table_type
2070+
* Access: RW
2071+
*/
2072+
MLXSW_ITEM32(reg, sftr2, table_type, 0x04, 16, 3);
2073+
2074+
/* reg_sftr2_range
2075+
* Range of entries to update
2076+
* Access: Index
2077+
*/
2078+
MLXSW_ITEM32(reg, sftr2, range, 0x04, 0, 16);
2079+
2080+
/* reg_sftr2_port
2081+
* Local port membership (1 bit per port).
2082+
* Access: RW
2083+
*/
2084+
MLXSW_ITEM_BIT_ARRAY(reg, sftr2, port, 0x20, 0x80, 1);
2085+
2086+
/* reg_sftr2_port_mask
2087+
* Local port mask (1 bit per port).
2088+
* Access: WO
2089+
*/
2090+
MLXSW_ITEM_BIT_ARRAY(reg, sftr2, port_mask, 0xA0, 0x80, 1);
2091+
2092+
static inline void mlxsw_reg_sftr2_pack(char *payload,
2093+
unsigned int flood_table,
2094+
unsigned int index,
2095+
enum mlxsw_flood_table_type table_type,
2096+
unsigned int range, u16 port, bool set)
2097+
{
2098+
MLXSW_REG_ZERO(sftr2, payload);
2099+
mlxsw_reg_sftr2_swid_set(payload, 0);
2100+
mlxsw_reg_sftr2_flood_table_set(payload, flood_table);
2101+
mlxsw_reg_sftr2_index_set(payload, index);
2102+
mlxsw_reg_sftr2_table_type_set(payload, table_type);
2103+
mlxsw_reg_sftr2_range_set(payload, range);
2104+
mlxsw_reg_sftr2_port_set(payload, port, set);
2105+
mlxsw_reg_sftr2_port_mask_set(payload, port, 1);
2106+
}
2107+
21082108
/* CWTP - Congetion WRED ECN TClass Profile
21092109
* ----------------------------------------
21102110
* Configures the profiles for queues of egress port and traffic class
@@ -12383,7 +12383,6 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
1238312383
MLXSW_REG(spvm),
1238412384
MLXSW_REG(spaft),
1238512385
MLXSW_REG(sfgc),
12386-
MLXSW_REG(sftr),
1238712386
MLXSW_REG(sfdf),
1238812387
MLXSW_REG(sldr),
1238912388
MLXSW_REG(slcr),
@@ -12396,6 +12395,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
1239612395
MLXSW_REG(spvmlr),
1239712396
MLXSW_REG(spvc),
1239812397
MLXSW_REG(spevet),
12398+
MLXSW_REG(sftr2),
1239912399
MLXSW_REG(cwtp),
1240012400
MLXSW_REG(cwtpm),
1240112401
MLXSW_REG(pgcr),

drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -323,7 +323,7 @@ int mlxsw_sp_fid_flood_set(struct mlxsw_sp_fid *fid,
323323
struct mlxsw_sp_fid_family *fid_family = fid->fid_family;
324324
const struct mlxsw_sp_fid_ops *ops = fid_family->ops;
325325
const struct mlxsw_sp_flood_table *flood_table;
326-
char *sftr_pl;
326+
char *sftr2_pl;
327327
int err;
328328

329329
if (WARN_ON(!fid_family->flood_tables || !ops->flood_index))
@@ -333,16 +333,16 @@ int mlxsw_sp_fid_flood_set(struct mlxsw_sp_fid *fid,
333333
if (!flood_table)
334334
return -ESRCH;
335335

336-
sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
337-
if (!sftr_pl)
336+
sftr2_pl = kmalloc(MLXSW_REG_SFTR2_LEN, GFP_KERNEL);
337+
if (!sftr2_pl)
338338
return -ENOMEM;
339339

340-
mlxsw_reg_sftr_pack(sftr_pl, flood_table->table_index,
341-
ops->flood_index(fid), flood_table->table_type, 1,
342-
local_port, member);
343-
err = mlxsw_reg_write(fid_family->mlxsw_sp->core, MLXSW_REG(sftr),
344-
sftr_pl);
345-
kfree(sftr_pl);
340+
mlxsw_reg_sftr2_pack(sftr2_pl, flood_table->table_index,
341+
ops->flood_index(fid), flood_table->table_type, 1,
342+
local_port, member);
343+
err = mlxsw_reg_write(fid_family->mlxsw_sp->core, MLXSW_REG(sftr2),
344+
sftr2_pl);
345+
kfree(sftr2_pl);
346346
return err;
347347
}
348348

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