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torvaldstorvalds
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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar: "Misc kernel side fixes. Generic: - cgroup events counting fix x86: - Intel PMU truncated-parameter fix - RDPMC fix - API naming fix/rename - uncore driver big-hardware PCI enumeration fix - uncore driver filter constraint fix" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/cgroup: Fix child event counting bug perf/x86/intel/uncore: Fix multi-domain PCI CHA enumeration bug on Skylake servers perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to 'large PEBS' perf/x86/intel/uncore: Add missing filter constraint for SKX CHA event perf/x86/intel: Don't accidentally clear high bits in bdw_limit_period() perf/x86/intel: Disable userspace RDPMC usage for large PEBS
2 parents 6bacf66 + c917e0f commit eaf6799

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6 files changed

+49
-33
lines changed

6 files changed

+49
-33
lines changed

‎arch/x86/events/core.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2118,7 +2118,8 @@ static int x86_pmu_event_init(struct perf_event *event)
21182118
event->destroy(event);
21192119
}
21202120

2121-
if (READ_ONCE(x86_pmu.attr_rdpmc))
2121+
if (READ_ONCE(x86_pmu.attr_rdpmc) &&
2122+
!(event->hw.flags & PERF_X86_EVENT_LARGE_PEBS))
21222123
event->hw.flags |= PERF_X86_EVENT_RDPMC_ALLOWED;
21232124

21242125
return err;

‎arch/x86/events/intel/core.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2952,9 +2952,9 @@ static void intel_pebs_aliases_skl(struct perf_event *event)
29522952
return intel_pebs_aliases_precdist(event);
29532953
}
29542954

2955-
static unsigned long intel_pmu_free_running_flags(struct perf_event *event)
2955+
static unsigned long intel_pmu_large_pebs_flags(struct perf_event *event)
29562956
{
2957-
unsigned long flags = x86_pmu.free_running_flags;
2957+
unsigned long flags = x86_pmu.large_pebs_flags;
29582958

29592959
if (event->attr.use_clockid)
29602960
flags &= ~PERF_SAMPLE_TIME;
@@ -2976,8 +2976,8 @@ static int intel_pmu_hw_config(struct perf_event *event)
29762976
if (!event->attr.freq) {
29772977
event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
29782978
if (!(event->attr.sample_type &
2979-
~intel_pmu_free_running_flags(event)))
2980-
event->hw.flags |= PERF_X86_EVENT_FREERUNNING;
2979+
~intel_pmu_large_pebs_flags(event)))
2980+
event->hw.flags |= PERF_X86_EVENT_LARGE_PEBS;
29812981
}
29822982
if (x86_pmu.pebs_aliases)
29832983
x86_pmu.pebs_aliases(event);
@@ -3194,7 +3194,7 @@ static unsigned bdw_limit_period(struct perf_event *event, unsigned left)
31943194
X86_CONFIG(.event=0xc0, .umask=0x01)) {
31953195
if (left < 128)
31963196
left = 128;
3197-
left &= ~0x3fu;
3197+
left &= ~0x3fULL;
31983198
}
31993199
return left;
32003200
}
@@ -3460,7 +3460,7 @@ static __initconst const struct x86_pmu core_pmu = {
34603460
.event_map = intel_pmu_event_map,
34613461
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
34623462
.apic = 1,
3463-
.free_running_flags = PEBS_FREERUNNING_FLAGS,
3463+
.large_pebs_flags = LARGE_PEBS_FLAGS,
34643464

34653465
/*
34663466
* Intel PMCs cannot be accessed sanely above 32-bit width,
@@ -3502,7 +3502,7 @@ static __initconst const struct x86_pmu intel_pmu = {
35023502
.event_map = intel_pmu_event_map,
35033503
.max_events = ARRAY_SIZE(intel_perfmon_event_map),
35043504
.apic = 1,
3505-
.free_running_flags = PEBS_FREERUNNING_FLAGS,
3505+
.large_pebs_flags = LARGE_PEBS_FLAGS,
35063506
/*
35073507
* Intel PMCs cannot be accessed sanely above 32 bit width,
35083508
* so we install an artificial 1<<31 period regardless of

‎arch/x86/events/intel/ds.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -935,7 +935,7 @@ void intel_pmu_pebs_add(struct perf_event *event)
935935
bool needed_cb = pebs_needs_sched_cb(cpuc);
936936

937937
cpuc->n_pebs++;
938-
if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
938+
if (hwc->flags & PERF_X86_EVENT_LARGE_PEBS)
939939
cpuc->n_large_pebs++;
940940

941941
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
@@ -975,7 +975,7 @@ void intel_pmu_pebs_del(struct perf_event *event)
975975
bool needed_cb = pebs_needs_sched_cb(cpuc);
976976

977977
cpuc->n_pebs--;
978-
if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
978+
if (hwc->flags & PERF_X86_EVENT_LARGE_PEBS)
979979
cpuc->n_large_pebs--;
980980

981981
pebs_update_state(needed_cb, cpuc, event->ctx->pmu);
@@ -1530,7 +1530,7 @@ void __init intel_ds_init(void)
15301530
x86_pmu.pebs_record_size =
15311531
sizeof(struct pebs_record_skl);
15321532
x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
1533-
x86_pmu.free_running_flags |= PERF_SAMPLE_TIME;
1533+
x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME;
15341534
break;
15351535

15361536
default:

‎arch/x86/events/intel/uncore_snbep.c

Lines changed: 18 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -3343,6 +3343,7 @@ static struct extra_reg skx_uncore_cha_extra_regs[] = {
33433343
SNBEP_CBO_EVENT_EXTRA_REG(0x9134, 0xffff, 0x4),
33443344
SNBEP_CBO_EVENT_EXTRA_REG(0x35, 0xff, 0x8),
33453345
SNBEP_CBO_EVENT_EXTRA_REG(0x36, 0xff, 0x8),
3346+
SNBEP_CBO_EVENT_EXTRA_REG(0x38, 0xff, 0x3),
33463347
EVENT_EXTRA_END
33473348
};
33483349

@@ -3562,24 +3563,27 @@ static struct intel_uncore_type *skx_msr_uncores[] = {
35623563
NULL,
35633564
};
35643565

3566+
/*
3567+
* To determine the number of CHAs, it should read bits 27:0 in the CAPID6
3568+
* register which located at Device 30, Function 3, Offset 0x9C. PCI ID 0x2083.
3569+
*/
3570+
#define SKX_CAPID6 0x9c
3571+
#define SKX_CHA_BIT_MASK GENMASK(27, 0)
3572+
35653573
static int skx_count_chabox(void)
35663574
{
3567-
struct pci_dev *chabox_dev = NULL;
3568-
int bus, count = 0;
3575+
struct pci_dev *dev = NULL;
3576+
u32 val = 0;
35693577

3570-
while (1) {
3571-
chabox_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x208d, chabox_dev);
3572-
if (!chabox_dev)
3573-
break;
3574-
if (count == 0)
3575-
bus = chabox_dev->bus->number;
3576-
if (bus != chabox_dev->bus->number)
3577-
break;
3578-
count++;
3579-
}
3578+
dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x2083, dev);
3579+
if (!dev)
3580+
goto out;
35803581

3581-
pci_dev_put(chabox_dev);
3582-
return count;
3582+
pci_read_config_dword(dev, SKX_CAPID6, &val);
3583+
val &= SKX_CHA_BIT_MASK;
3584+
out:
3585+
pci_dev_put(dev);
3586+
return hweight32(val);
35833587
}
35843588

35853589
void skx_uncore_cpu_init(void)

‎arch/x86/events/perf_event.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ struct event_constraint {
6969
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0100 /* grant rdpmc permission */
7070
#define PERF_X86_EVENT_EXCL_ACCT 0x0200 /* accounted EXCL event */
7171
#define PERF_X86_EVENT_AUTO_RELOAD 0x0400 /* use PEBS auto-reload */
72-
#define PERF_X86_EVENT_FREERUNNING 0x0800 /* use freerunning PEBS */
72+
#define PERF_X86_EVENT_LARGE_PEBS 0x0800 /* use large PEBS */
7373

7474

7575
struct amd_nb {
@@ -88,7 +88,7 @@ struct amd_nb {
8888
* REGS_USER can be handled for events limited to ring 3.
8989
*
9090
*/
91-
#define PEBS_FREERUNNING_FLAGS \
91+
#define LARGE_PEBS_FLAGS \
9292
(PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | \
9393
PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | \
9494
PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | \
@@ -608,7 +608,7 @@ struct x86_pmu {
608608
struct event_constraint *pebs_constraints;
609609
void (*pebs_aliases)(struct perf_event *event);
610610
int max_pebs_events;
611-
unsigned long free_running_flags;
611+
unsigned long large_pebs_flags;
612612

613613
/*
614614
* Intel LBR

‎kernel/events/core.c

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -724,9 +724,15 @@ static inline void __update_cgrp_time(struct perf_cgroup *cgrp)
724724

725725
static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx)
726726
{
727-
struct perf_cgroup *cgrp_out = cpuctx->cgrp;
728-
if (cgrp_out)
729-
__update_cgrp_time(cgrp_out);
727+
struct perf_cgroup *cgrp = cpuctx->cgrp;
728+
struct cgroup_subsys_state *css;
729+
730+
if (cgrp) {
731+
for (css = &cgrp->css; css; css = css->parent) {
732+
cgrp = container_of(css, struct perf_cgroup, css);
733+
__update_cgrp_time(cgrp);
734+
}
735+
}
730736
}
731737

732738
static inline void update_cgrp_time_from_event(struct perf_event *event)
@@ -754,6 +760,7 @@ perf_cgroup_set_timestamp(struct task_struct *task,
754760
{
755761
struct perf_cgroup *cgrp;
756762
struct perf_cgroup_info *info;
763+
struct cgroup_subsys_state *css;
757764

758765
/*
759766
* ctx->lock held by caller
@@ -764,8 +771,12 @@ perf_cgroup_set_timestamp(struct task_struct *task,
764771
return;
765772

766773
cgrp = perf_cgroup_from_task(task, ctx);
767-
info = this_cpu_ptr(cgrp->info);
768-
info->timestamp = ctx->timestamp;
774+
775+
for (css = &cgrp->css; css; css = css->parent) {
776+
cgrp = container_of(css, struct perf_cgroup, css);
777+
info = this_cpu_ptr(cgrp->info);
778+
info->timestamp = ctx->timestamp;
779+
}
769780
}
770781

771782
static DEFINE_PER_CPU(struct list_head, cgrp_cpuctx_list);

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