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wdmegrvdavem330
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net: stmmac: dwmac-rk: Add handling for RGMII_ID/RXID/TXID
ATM dwmac-rk will always set and enable it's internal delay lines. Using PHY internal delays in combination with the phy-mode rgmii-id/rxid/txid was not possible. Only rgmii was supported. Now we can disable rockchip's gmac delay lines and also use rgmii-id/rxid/txid. Tested only with a RK3288 based board. Signed-off-by: Wadim Egorov <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+37
-16
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drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

Lines changed: 37 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,10 @@ struct rk_priv_data {
7474
#define GRF_BIT(nr) (BIT(nr) | BIT(nr+16))
7575
#define GRF_CLR_BIT(nr) (BIT(nr+16))
7676

77+
#define DELAY_ENABLE(soc, tx, rx) \
78+
(((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \
79+
((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))
80+
7781
#define RK3228_GRF_MAC_CON0 0x0900
7882
#define RK3228_GRF_MAC_CON1 0x0904
7983

@@ -115,8 +119,7 @@ static void rk3228_set_to_rgmii(struct rk_priv_data *bsp_priv,
115119
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
116120
RK3228_GMAC_PHY_INTF_SEL_RGMII |
117121
RK3228_GMAC_RMII_MODE_CLR |
118-
RK3228_GMAC_RXCLK_DLY_ENABLE |
119-
RK3228_GMAC_TXCLK_DLY_ENABLE);
122+
DELAY_ENABLE(RK3228, tx_delay, rx_delay));
120123

121124
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON0,
122125
RK3228_GMAC_CLK_RX_DL_CFG(rx_delay) |
@@ -232,8 +235,7 @@ static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv,
232235
RK3288_GMAC_PHY_INTF_SEL_RGMII |
233236
RK3288_GMAC_RMII_MODE_CLR);
234237
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3,
235-
RK3288_GMAC_RXCLK_DLY_ENABLE |
236-
RK3288_GMAC_TXCLK_DLY_ENABLE |
238+
DELAY_ENABLE(RK3288, tx_delay, rx_delay) |
237239
RK3288_GMAC_CLK_RX_DL_CFG(rx_delay) |
238240
RK3288_GMAC_CLK_TX_DL_CFG(tx_delay));
239241
}
@@ -460,8 +462,7 @@ static void rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv,
460462
RK3366_GMAC_PHY_INTF_SEL_RGMII |
461463
RK3366_GMAC_RMII_MODE_CLR);
462464
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON7,
463-
RK3366_GMAC_RXCLK_DLY_ENABLE |
464-
RK3366_GMAC_TXCLK_DLY_ENABLE |
465+
DELAY_ENABLE(RK3366, tx_delay, rx_delay) |
465466
RK3366_GMAC_CLK_RX_DL_CFG(rx_delay) |
466467
RK3366_GMAC_CLK_TX_DL_CFG(tx_delay));
467468
}
@@ -572,8 +573,7 @@ static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv,
572573
RK3368_GMAC_PHY_INTF_SEL_RGMII |
573574
RK3368_GMAC_RMII_MODE_CLR);
574575
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON16,
575-
RK3368_GMAC_RXCLK_DLY_ENABLE |
576-
RK3368_GMAC_TXCLK_DLY_ENABLE |
576+
DELAY_ENABLE(RK3368, tx_delay, rx_delay) |
577577
RK3368_GMAC_CLK_RX_DL_CFG(rx_delay) |
578578
RK3368_GMAC_CLK_TX_DL_CFG(tx_delay));
579579
}
@@ -684,8 +684,7 @@ static void rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv,
684684
RK3399_GMAC_PHY_INTF_SEL_RGMII |
685685
RK3399_GMAC_RMII_MODE_CLR);
686686
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON6,
687-
RK3399_GMAC_RXCLK_DLY_ENABLE |
688-
RK3399_GMAC_TXCLK_DLY_ENABLE |
687+
DELAY_ENABLE(RK3399, tx_delay, rx_delay) |
689688
RK3399_GMAC_CLK_RX_DL_CFG(rx_delay) |
690689
RK3399_GMAC_CLK_TX_DL_CFG(tx_delay));
691690
}
@@ -985,14 +984,29 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
985984
return ret;
986985

987986
/*rmii or rgmii*/
988-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII) {
987+
switch (bsp_priv->phy_iface) {
988+
case PHY_INTERFACE_MODE_RGMII:
989989
dev_info(dev, "init for RGMII\n");
990990
bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay,
991991
bsp_priv->rx_delay);
992-
} else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
992+
break;
993+
case PHY_INTERFACE_MODE_RGMII_ID:
994+
dev_info(dev, "init for RGMII_ID\n");
995+
bsp_priv->ops->set_to_rgmii(bsp_priv, 0, 0);
996+
break;
997+
case PHY_INTERFACE_MODE_RGMII_RXID:
998+
dev_info(dev, "init for RGMII_RXID\n");
999+
bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay, 0);
1000+
break;
1001+
case PHY_INTERFACE_MODE_RGMII_TXID:
1002+
dev_info(dev, "init for RGMII_TXID\n");
1003+
bsp_priv->ops->set_to_rgmii(bsp_priv, 0, bsp_priv->rx_delay);
1004+
break;
1005+
case PHY_INTERFACE_MODE_RMII:
9931006
dev_info(dev, "init for RMII\n");
9941007
bsp_priv->ops->set_to_rmii(bsp_priv);
995-
} else {
1008+
break;
1009+
default:
9961010
dev_err(dev, "NO interface defined!\n");
9971011
}
9981012

@@ -1022,12 +1036,19 @@ static void rk_fix_speed(void *priv, unsigned int speed)
10221036
struct rk_priv_data *bsp_priv = priv;
10231037
struct device *dev = &bsp_priv->pdev->dev;
10241038

1025-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII)
1039+
switch (bsp_priv->phy_iface) {
1040+
case PHY_INTERFACE_MODE_RGMII:
1041+
case PHY_INTERFACE_MODE_RGMII_ID:
1042+
case PHY_INTERFACE_MODE_RGMII_RXID:
1043+
case PHY_INTERFACE_MODE_RGMII_TXID:
10261044
bsp_priv->ops->set_rgmii_speed(bsp_priv, speed);
1027-
else if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1045+
break;
1046+
case PHY_INTERFACE_MODE_RMII:
10281047
bsp_priv->ops->set_rmii_speed(bsp_priv, speed);
1029-
else
1048+
break;
1049+
default:
10301050
dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
1051+
}
10311052
}
10321053

10331054
static int rk_gmac_probe(struct platform_device *pdev)

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