@@ -1506,6 +1506,230 @@ u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
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return speed_mask ;
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}
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+ enum bnxt_media_type {
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+ BNXT_MEDIA_UNKNOWN = 0 ,
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+ BNXT_MEDIA_TP ,
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+ BNXT_MEDIA_CR ,
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+ BNXT_MEDIA_SR ,
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+ BNXT_MEDIA_LR_ER_FR ,
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+ BNXT_MEDIA_KR ,
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+ BNXT_MEDIA_KX ,
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+ BNXT_MEDIA_X ,
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+ __BNXT_MEDIA_END ,
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+ };
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+
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+ static const enum bnxt_media_type bnxt_phy_types [] = {
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASECR ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR4 ] = BNXT_MEDIA_KR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASELR ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASESR ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR2 ] = BNXT_MEDIA_KR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKX ] = BNXT_MEDIA_KX ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR ] = BNXT_MEDIA_KR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ] = BNXT_MEDIA_TP ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ] = BNXT_MEDIA_TP ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_L ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_S ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_N ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASESR ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR4 ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR4 ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR10 ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASECR4 ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASESR4 ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASELR4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASEER4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_ACTIVE_CABLE ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASET ] = BNXT_MEDIA_TP ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASESX ] = BNXT_MEDIA_X ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASECX ] = BNXT_MEDIA_X ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR4 ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4 ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2 ] = BNXT_MEDIA_CR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2 ] = BNXT_MEDIA_SR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2 ] = BNXT_MEDIA_LR_ER_FR ,
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+ [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2 ] = BNXT_MEDIA_LR_ER_FR ,
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+ };
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+
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+ static enum bnxt_media_type
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+ bnxt_get_media (struct bnxt_link_info * link_info )
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+ {
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+ switch (link_info -> media_type ) {
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+ case PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP :
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+ return BNXT_MEDIA_TP ;
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+ case PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC :
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+ return BNXT_MEDIA_CR ;
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+ default :
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+ if (link_info -> phy_type < ARRAY_SIZE (bnxt_phy_types ))
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+ return bnxt_phy_types [link_info -> phy_type ];
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+ return BNXT_MEDIA_UNKNOWN ;
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+ }
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+ }
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+
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+ enum bnxt_link_speed_indices {
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+ BNXT_LINK_SPEED_UNKNOWN = 0 ,
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+ BNXT_LINK_SPEED_100MB_IDX ,
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+ BNXT_LINK_SPEED_1GB_IDX ,
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+ BNXT_LINK_SPEED_10GB_IDX ,
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+ BNXT_LINK_SPEED_25GB_IDX ,
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+ BNXT_LINK_SPEED_40GB_IDX ,
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+ BNXT_LINK_SPEED_50GB_IDX ,
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+ BNXT_LINK_SPEED_100GB_IDX ,
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+ BNXT_LINK_SPEED_200GB_IDX ,
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+ __BNXT_LINK_SPEED_END
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+ };
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+
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+ static enum bnxt_link_speed_indices bnxt_fw_speed_idx (u16 speed )
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+ {
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+ switch (speed ) {
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+ case BNXT_LINK_SPEED_100MB : return BNXT_LINK_SPEED_100MB_IDX ;
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+ case BNXT_LINK_SPEED_1GB : return BNXT_LINK_SPEED_1GB_IDX ;
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+ case BNXT_LINK_SPEED_10GB : return BNXT_LINK_SPEED_10GB_IDX ;
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+ case BNXT_LINK_SPEED_25GB : return BNXT_LINK_SPEED_25GB_IDX ;
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+ case BNXT_LINK_SPEED_40GB : return BNXT_LINK_SPEED_40GB_IDX ;
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+ case BNXT_LINK_SPEED_50GB : return BNXT_LINK_SPEED_50GB_IDX ;
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+ case BNXT_LINK_SPEED_100GB : return BNXT_LINK_SPEED_100GB_IDX ;
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+ case BNXT_LINK_SPEED_200GB : return BNXT_LINK_SPEED_200GB_IDX ;
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+ default : return BNXT_LINK_SPEED_UNKNOWN ;
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+ }
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+ }
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+
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+ static const enum ethtool_link_mode_bit_indices
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+ bnxt_link_modes [__BNXT_LINK_SPEED_END ][BNXT_SIG_MODE_MAX ][__BNXT_MEDIA_END ] = {
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+ [BNXT_LINK_SPEED_100MB_IDX ] = {
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+ {
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+ [BNXT_MEDIA_TP ] = ETHTOOL_LINK_MODE_100baseT_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_1GB_IDX ] = {
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+ {
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+ [BNXT_MEDIA_TP ] = ETHTOOL_LINK_MODE_1000baseT_Full_BIT ,
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+ /* historically baseT, but DAC is more correctly baseX */
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT ,
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+ [BNXT_MEDIA_KX ] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT ,
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+ [BNXT_MEDIA_X ] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_10GB_IDX ] = {
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+ {
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+ [BNXT_MEDIA_TP ] = ETHTOOL_LINK_MODE_10000baseT_Full_BIT ,
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_10000baseCR_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_10000baseSR_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_10000baseLR_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT ,
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+ [BNXT_MEDIA_KX ] = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_25GB_IDX ] = {
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+ {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_40GB_IDX ] = {
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+ {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_50GB_IDX ] = {
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+ [BNXT_SIG_MODE_NRZ ] = {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT ,
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+ },
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+ [BNXT_SIG_MODE_PAM4 ] = {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_50000baseCR_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_50000baseSR_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_50000baseKR_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_100GB_IDX ] = {
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+ [BNXT_SIG_MODE_NRZ ] = {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT ,
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+ },
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+ [BNXT_SIG_MODE_PAM4 ] = {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT ,
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+ },
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+ },
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+ [BNXT_LINK_SPEED_200GB_IDX ] = {
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+ [BNXT_SIG_MODE_PAM4 ] = {
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+ [BNXT_MEDIA_CR ] = ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT ,
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+ [BNXT_MEDIA_SR ] = ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT ,
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+ [BNXT_MEDIA_LR_ER_FR ] = ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT ,
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+ [BNXT_MEDIA_KR ] = ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT ,
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+ },
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+ },
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+ };
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+
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+ #define BNXT_LINK_MODE_UNKNOWN -1
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+
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+ static enum ethtool_link_mode_bit_indices
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+ bnxt_get_link_mode (struct bnxt_link_info * link_info )
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+ {
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+ enum ethtool_link_mode_bit_indices link_mode ;
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+ enum bnxt_link_speed_indices speed ;
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+ enum bnxt_media_type media ;
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+ u8 sig_mode ;
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+
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+ if (link_info -> phy_link_status != BNXT_LINK_LINK )
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+ return BNXT_LINK_MODE_UNKNOWN ;
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+
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+ media = bnxt_get_media (link_info );
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+ if (BNXT_AUTO_MODE (link_info -> auto_mode )) {
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+ speed = bnxt_fw_speed_idx (link_info -> link_speed );
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+ sig_mode = link_info -> active_fec_sig_mode &
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+ PORT_PHY_QCFG_RESP_SIGNAL_MODE_MASK ;
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+ } else {
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+ speed = bnxt_fw_speed_idx (link_info -> req_link_speed );
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+ sig_mode = link_info -> req_signal_mode ;
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+ }
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+ if (sig_mode >= BNXT_SIG_MODE_MAX )
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+ return BNXT_LINK_MODE_UNKNOWN ;
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+
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+ /* Note ETHTOOL_LINK_MODE_10baseT_Half_BIT == 0 is a legal Linux
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+ * link mode, but since no such devices exist, the zeroes in the
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+ * map can be conveniently used to represent unknown link modes.
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+ */
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+ link_mode = bnxt_link_modes [speed ][sig_mode ][media ];
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+ if (!link_mode )
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+ return BNXT_LINK_MODE_UNKNOWN ;
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+
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+ switch (link_mode ) {
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+ case ETHTOOL_LINK_MODE_100baseT_Full_BIT :
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+ if (~link_info -> duplex & BNXT_LINK_DUPLEX_FULL )
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+ link_mode = ETHTOOL_LINK_MODE_100baseT_Half_BIT ;
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+ break ;
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+ case ETHTOOL_LINK_MODE_1000baseT_Full_BIT :
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+ if (~link_info -> duplex & BNXT_LINK_DUPLEX_FULL )
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+ link_mode = ETHTOOL_LINK_MODE_1000baseT_Half_BIT ;
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+ break ;
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+ default :
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+ break ;
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+ }
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+
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+ return link_mode ;
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+ }
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+
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#define BNXT_FW_TO_ETHTOOL_SPDS (fw_speeds , fw_pause , lk_ksettings , name )\
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{ \
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if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
@@ -1720,42 +1944,56 @@ u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
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}
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}
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+ static void bnxt_get_default_speeds (struct ethtool_link_ksettings * lk_ksettings ,
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+ struct bnxt_link_info * link_info )
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+ {
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+ struct ethtool_link_settings * base = & lk_ksettings -> base ;
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+
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+ if (link_info -> link_state == BNXT_LINK_STATE_UP ) {
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+ base -> speed = bnxt_fw_to_ethtool_speed (link_info -> link_speed );
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+ base -> duplex = DUPLEX_HALF ;
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+ if (link_info -> duplex & BNXT_LINK_DUPLEX_FULL )
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+ base -> duplex = DUPLEX_FULL ;
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+ } else if (!link_info -> autoneg ) {
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+ base -> speed = bnxt_fw_to_ethtool_speed (link_info -> req_link_speed );
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+ base -> duplex = DUPLEX_HALF ;
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+ if (link_info -> req_duplex == BNXT_LINK_DUPLEX_FULL )
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+ base -> duplex = DUPLEX_FULL ;
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+ }
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+ }
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+
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static int bnxt_get_link_ksettings (struct net_device * dev ,
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struct ethtool_link_ksettings * lk_ksettings )
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{
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- struct bnxt * bp = netdev_priv (dev );
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- struct bnxt_link_info * link_info = & bp -> link_info ;
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struct ethtool_link_settings * base = & lk_ksettings -> base ;
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- u32 ethtool_speed ;
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+ enum ethtool_link_mode_bit_indices link_mode ;
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+ struct bnxt * bp = netdev_priv (dev );
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+ struct bnxt_link_info * link_info ;
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+ ethtool_link_ksettings_zero_link_mode (lk_ksettings , advertising );
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ethtool_link_ksettings_zero_link_mode (lk_ksettings , supported );
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+ base -> duplex = DUPLEX_UNKNOWN ;
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+ base -> speed = SPEED_UNKNOWN ;
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+ link_info = & bp -> link_info ;
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+
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mutex_lock (& bp -> link_lock );
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bnxt_fw_to_ethtool_support_spds (link_info , lk_ksettings );
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+ link_mode = bnxt_get_link_mode (link_info );
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+ if (link_mode != BNXT_LINK_MODE_UNKNOWN )
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+ ethtool_params_from_link_mode (lk_ksettings , link_mode );
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+ else
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+ bnxt_get_default_speeds (lk_ksettings , link_info );
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- ethtool_link_ksettings_zero_link_mode (lk_ksettings , advertising );
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if (link_info -> autoneg ) {
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bnxt_fw_to_ethtool_advertised_spds (link_info , lk_ksettings );
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ethtool_link_ksettings_add_link_mode (lk_ksettings ,
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advertising , Autoneg );
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base -> autoneg = AUTONEG_ENABLE ;
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- base -> duplex = DUPLEX_UNKNOWN ;
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- if (link_info -> phy_link_status == BNXT_LINK_LINK ) {
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+ if (link_info -> phy_link_status == BNXT_LINK_LINK )
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bnxt_fw_to_ethtool_lp_adv (link_info , lk_ksettings );
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- if (link_info -> duplex & BNXT_LINK_DUPLEX_FULL )
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- base -> duplex = DUPLEX_FULL ;
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- else
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- base -> duplex = DUPLEX_HALF ;
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- }
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- ethtool_speed = bnxt_fw_to_ethtool_speed (link_info -> link_speed );
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} else {
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base -> autoneg = AUTONEG_DISABLE ;
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- ethtool_speed =
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- bnxt_fw_to_ethtool_speed (link_info -> req_link_speed );
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- base -> duplex = DUPLEX_HALF ;
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- if (link_info -> req_duplex == BNXT_LINK_DUPLEX_FULL )
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- base -> duplex = DUPLEX_FULL ;
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}
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- base -> speed = ethtool_speed ;
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base -> port = PORT_NONE ;
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if (link_info -> media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP ) {
@@ -1772,8 +2010,7 @@ static int bnxt_get_link_ksettings(struct net_device *dev,
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if (link_info -> media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC )
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base -> port = PORT_DA ;
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- else if (link_info -> media_type ==
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- PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE )
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+ else
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base -> port = PORT_FIBRE ;
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}
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base -> phy_address = link_info -> phy_addr ;
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