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50 | 50 | * Site Register
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51 | 51 | */
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52 | 52 | #define TRITSR_V BIT(31)
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| 53 | +#define TRITSR_TP5 BIT(9) |
53 | 54 | #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
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54 | 55 | * site adjustment register
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55 | 56 | */
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@@ -117,10 +118,15 @@ static int tmu_get_temp(struct thermal_zone_device *tz, int *temp)
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117 | 118 | 10 * USEC_PER_MSEC))
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118 | 119 | return -ENODATA;
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119 | 120 |
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120 |
| - if (qdata->ver == TMU_VER1) |
| 121 | + if (qdata->ver == TMU_VER1) { |
121 | 122 | *temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;
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122 |
| - else |
123 |
| - *temp = kelvin_to_millicelsius(val & GENMASK(8, 0)); |
| 123 | + } else { |
| 124 | + if (val & TRITSR_TP5) |
| 125 | + *temp = milli_kelvin_to_millicelsius((val & GENMASK(8, 0)) * |
| 126 | + MILLIDEGREE_PER_DEGREE + 500); |
| 127 | + else |
| 128 | + *temp = kelvin_to_millicelsius(val & GENMASK(8, 0)); |
| 129 | + } |
124 | 130 |
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125 | 131 | return 0;
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126 | 132 | }
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@@ -234,7 +240,7 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
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234 | 240 |
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235 | 241 | static const struct regmap_range qoriq_yes_ranges[] = {
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236 | 242 | regmap_reg_range(REGS_TMR, REGS_TSCFGR),
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237 |
| - regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)), |
| 243 | + regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)), |
238 | 244 | regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
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239 | 245 | regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
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240 | 246 | regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
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