@@ -141,7 +141,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
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int layer , struct drm_plane * plane )
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{
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struct drm_plane_state * state = plane -> state ;
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- struct drm_framebuffer * fb = state -> fb ;
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DRM_DEBUG_DRIVER ("Updating layer %d\n" , layer );
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@@ -153,12 +152,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
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state -> crtc_h ));
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}
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- /* Set the line width */
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- DRM_DEBUG_DRIVER ("Layer line width: %d bits\n" , fb -> pitches [0 ] * 8 );
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- regmap_write (backend -> engine .regs ,
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- SUN4I_BACKEND_LAYLINEWIDTH_REG (layer ),
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- fb -> pitches [0 ] * 8 );
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-
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/* Set height and width */
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DRM_DEBUG_DRIVER ("Layer size W: %u H: %u\n" ,
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state -> crtc_w , state -> crtc_h );
@@ -218,6 +211,12 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
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u32 lo_paddr , hi_paddr ;
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dma_addr_t paddr ;
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+ /* Set the line width */
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+ DRM_DEBUG_DRIVER ("Layer line width: %d bits\n" , fb -> pitches [0 ] * 8 );
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+ regmap_write (backend -> engine .regs ,
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+ SUN4I_BACKEND_LAYLINEWIDTH_REG (layer ),
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+ fb -> pitches [0 ] * 8 );
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+
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/* Get the start of the displayed memory */
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paddr = drm_fb_cma_get_gem_addr (fb , state , 0 );
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DRM_DEBUG_DRIVER ("Setting buffer address to %pad\n" , & paddr );
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