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Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/kms/r6xx+: voltage fixes drm/nouveau: drop leftover debugging drm/radeon: avoid warnings from r600/eg irq handlers on powered off card. drm/radeon/kms: add missing param for dce3.2 DP transmitter setup drm/radeon/kms/atom: fix duallink on some early DCE3.2 cards drm/nouveau: fix assumption that semaphore dmaobj is valid in x-chan sync drm/nv50/disp: fix gamma with page flipping overlay turned on drm/nouveau/pm: Prevent overflow in nouveau_perf_init() drm/nouveau: fix big-endian switch
2 parents 85d45ad + a377e18 commit f5fc556

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10 files changed

+84
-61
lines changed

10 files changed

+84
-61
lines changed

drivers/gpu/drm/nouveau/nouveau_acpi.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -262,7 +262,6 @@ static bool nouveau_dsm_detect(void)
262262
vga_count++;
263263

264264
retval = nouveau_dsm_pci_probe(pdev);
265-
printk("ret val is %d\n", retval);
266265
if (retval & NOUVEAU_DSM_HAS_MUX)
267266
has_dsm |= 1;
268267
if (retval & NOUVEAU_DSM_HAS_OPT)

drivers/gpu/drm/nouveau/nouveau_fence.c

Lines changed: 25 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -339,22 +339,25 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
339339
int ret;
340340

341341
if (dev_priv->chipset < 0x84) {
342-
ret = RING_SPACE(chan, 3);
342+
ret = RING_SPACE(chan, 4);
343343
if (ret)
344344
return ret;
345345

346-
BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 2);
346+
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3);
347+
OUT_RING (chan, NvSema);
347348
OUT_RING (chan, sema->mem->start);
348349
OUT_RING (chan, 1);
349350
} else
350351
if (dev_priv->chipset < 0xc0) {
351352
struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
352353
u64 offset = vma->offset + sema->mem->start;
353354

354-
ret = RING_SPACE(chan, 5);
355+
ret = RING_SPACE(chan, 7);
355356
if (ret)
356357
return ret;
357358

359+
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
360+
OUT_RING (chan, chan->vram_handle);
358361
BEGIN_RING(chan, NvSubSw, 0x0010, 4);
359362
OUT_RING (chan, upper_32_bits(offset));
360363
OUT_RING (chan, lower_32_bits(offset));
@@ -394,11 +397,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
394397
int ret;
395398

396399
if (dev_priv->chipset < 0x84) {
397-
ret = RING_SPACE(chan, 4);
400+
ret = RING_SPACE(chan, 5);
398401
if (ret)
399402
return ret;
400403

401-
BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
404+
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2);
405+
OUT_RING (chan, NvSema);
402406
OUT_RING (chan, sema->mem->start);
403407
BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1);
404408
OUT_RING (chan, 1);
@@ -407,10 +411,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
407411
struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
408412
u64 offset = vma->offset + sema->mem->start;
409413

410-
ret = RING_SPACE(chan, 5);
414+
ret = RING_SPACE(chan, 7);
411415
if (ret)
412416
return ret;
413417

418+
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
419+
OUT_RING (chan, chan->vram_handle);
414420
BEGIN_RING(chan, NvSubSw, 0x0010, 4);
415421
OUT_RING (chan, upper_32_bits(offset));
416422
OUT_RING (chan, lower_32_bits(offset));
@@ -504,22 +510,22 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
504510
struct nouveau_gpuobj *obj = NULL;
505511
int ret;
506512

507-
if (dev_priv->card_type >= NV_C0)
508-
goto out_initialised;
513+
if (dev_priv->card_type < NV_C0) {
514+
/* Create an NV_SW object for various sync purposes */
515+
ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
516+
if (ret)
517+
return ret;
509518

510-
/* Create an NV_SW object for various sync purposes */
511-
ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
512-
if (ret)
513-
return ret;
519+
ret = RING_SPACE(chan, 2);
520+
if (ret)
521+
return ret;
514522

515-
/* we leave subchannel empty for nvc0 */
516-
ret = RING_SPACE(chan, 2);
517-
if (ret)
518-
return ret;
519-
BEGIN_RING(chan, NvSubSw, 0, 1);
520-
OUT_RING(chan, NvSw);
523+
BEGIN_RING(chan, NvSubSw, 0, 1);
524+
OUT_RING (chan, NvSw);
525+
FIRE_RING (chan);
526+
}
521527

522-
/* Create a DMA object for the shared cross-channel sync area. */
528+
/* Setup area of memory shared between all channels for x-chan sync */
523529
if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
524530
struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
525531

@@ -534,23 +540,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
534540
nouveau_gpuobj_ref(NULL, &obj);
535541
if (ret)
536542
return ret;
537-
538-
ret = RING_SPACE(chan, 2);
539-
if (ret)
540-
return ret;
541-
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
542-
OUT_RING(chan, NvSema);
543-
} else {
544-
ret = RING_SPACE(chan, 2);
545-
if (ret)
546-
return ret;
547-
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
548-
OUT_RING (chan, chan->vram_handle); /* whole VM */
549543
}
550544

551-
FIRE_RING(chan);
552-
553-
out_initialised:
554545
INIT_LIST_HEAD(&chan->fence.pending);
555546
spin_lock_init(&chan->fence.lock);
556547
atomic_set(&chan->fence.last_sequence_irq, 0);

drivers/gpu/drm/nouveau/nouveau_perf.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,11 @@ nouveau_perf_init(struct drm_device *dev)
182182
entries = perf[2];
183183
}
184184

185+
if (entries > NOUVEAU_PM_MAX_LEVEL) {
186+
NV_DEBUG(dev, "perf table has too many entries - buggy vbios?\n");
187+
entries = NOUVEAU_PM_MAX_LEVEL;
188+
}
189+
185190
entry = perf + headerlen;
186191
for (i = 0; i < entries; i++) {
187192
struct nouveau_pm_level *perflvl = &pm->perflvl[pm->nr_perflvl];

drivers/gpu/drm/nouveau/nouveau_state.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -881,8 +881,8 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
881881

882882
#ifdef __BIG_ENDIAN
883883
/* Put the card in BE mode if it's not */
884-
if (nv_rd32(dev, NV03_PMC_BOOT_1))
885-
nv_wr32(dev, NV03_PMC_BOOT_1, 0x00000001);
884+
if (nv_rd32(dev, NV03_PMC_BOOT_1) != 0x01000001)
885+
nv_wr32(dev, NV03_PMC_BOOT_1, 0x01000001);
886886

887887
DRM_MEMORYBARRIER();
888888
#endif

drivers/gpu/drm/nouveau/nv50_display.c

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -409,7 +409,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
409409
struct nouveau_channel *evo = dispc->sync;
410410
int ret;
411411

412-
ret = RING_SPACE(evo, 24);
412+
ret = RING_SPACE(evo, chan ? 25 : 27);
413413
if (unlikely(ret))
414414
return ret;
415415

@@ -458,8 +458,19 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
458458
/* queue the flip on the crtc's "display sync" channel */
459459
BEGIN_RING(evo, 0, 0x0100, 1);
460460
OUT_RING (evo, 0xfffe0000);
461-
BEGIN_RING(evo, 0, 0x0084, 5);
462-
OUT_RING (evo, chan ? 0x00000100 : 0x00000010);
461+
if (chan) {
462+
BEGIN_RING(evo, 0, 0x0084, 1);
463+
OUT_RING (evo, 0x00000100);
464+
} else {
465+
BEGIN_RING(evo, 0, 0x0084, 1);
466+
OUT_RING (evo, 0x00000010);
467+
/* allows gamma somehow, PDISP will bitch at you if
468+
* you don't wait for vblank before changing this..
469+
*/
470+
BEGIN_RING(evo, 0, 0x00e0, 1);
471+
OUT_RING (evo, 0x40000000);
472+
}
473+
BEGIN_RING(evo, 0, 0x0088, 4);
463474
OUT_RING (evo, dispc->sem.offset);
464475
OUT_RING (evo, 0xf00d0000 | dispc->sem.value);
465476
OUT_RING (evo, 0x74b1e000);

drivers/gpu/drm/radeon/evergreen.c

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -140,11 +140,17 @@ void evergreen_pm_misc(struct radeon_device *rdev)
140140
struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
141141

142142
if (voltage->type == VOLTAGE_SW) {
143+
/* 0xff01 is a flag rather then an actual voltage */
144+
if (voltage->voltage == 0xff01)
145+
return;
143146
if (voltage->voltage && (voltage->voltage != rdev->pm.current_vddc)) {
144147
radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
145148
rdev->pm.current_vddc = voltage->voltage;
146149
DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage);
147150
}
151+
/* 0xff01 is a flag rather then an actual voltage */
152+
if (voltage->vddci == 0xff01)
153+
return;
148154
if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) {
149155
radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI);
150156
rdev->pm.current_vddci = voltage->vddci;
@@ -2695,28 +2701,25 @@ static inline u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
26952701

26962702
int evergreen_irq_process(struct radeon_device *rdev)
26972703
{
2698-
u32 wptr = evergreen_get_ih_wptr(rdev);
2699-
u32 rptr = rdev->ih.rptr;
2704+
u32 wptr;
2705+
u32 rptr;
27002706
u32 src_id, src_data;
27012707
u32 ring_index;
27022708
unsigned long flags;
27032709
bool queue_hotplug = false;
27042710

2705-
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
2706-
if (!rdev->ih.enabled)
2711+
if (!rdev->ih.enabled || rdev->shutdown)
27072712
return IRQ_NONE;
27082713

2709-
spin_lock_irqsave(&rdev->ih.lock, flags);
2714+
wptr = evergreen_get_ih_wptr(rdev);
2715+
rptr = rdev->ih.rptr;
2716+
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
27102717

2718+
spin_lock_irqsave(&rdev->ih.lock, flags);
27112719
if (rptr == wptr) {
27122720
spin_unlock_irqrestore(&rdev->ih.lock, flags);
27132721
return IRQ_NONE;
27142722
}
2715-
if (rdev->shutdown) {
2716-
spin_unlock_irqrestore(&rdev->ih.lock, flags);
2717-
return IRQ_NONE;
2718-
}
2719-
27202723
restart_ih:
27212724
/* display interrupts */
27222725
evergreen_irq_ack(rdev);

drivers/gpu/drm/radeon/r600.c

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -590,6 +590,9 @@ void r600_pm_misc(struct radeon_device *rdev)
590590
struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
591591

592592
if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
593+
/* 0xff01 is a flag rather then an actual voltage */
594+
if (voltage->voltage == 0xff01)
595+
return;
593596
if (voltage->voltage != rdev->pm.current_vddc) {
594597
radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
595598
rdev->pm.current_vddc = voltage->voltage;
@@ -3294,27 +3297,26 @@ static inline u32 r600_get_ih_wptr(struct radeon_device *rdev)
32943297

32953298
int r600_irq_process(struct radeon_device *rdev)
32963299
{
3297-
u32 wptr = r600_get_ih_wptr(rdev);
3298-
u32 rptr = rdev->ih.rptr;
3300+
u32 wptr;
3301+
u32 rptr;
32993302
u32 src_id, src_data;
33003303
u32 ring_index;
33013304
unsigned long flags;
33023305
bool queue_hotplug = false;
33033306

3304-
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
3305-
if (!rdev->ih.enabled)
3307+
if (!rdev->ih.enabled || rdev->shutdown)
33063308
return IRQ_NONE;
33073309

3310+
wptr = r600_get_ih_wptr(rdev);
3311+
rptr = rdev->ih.rptr;
3312+
DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
3313+
33083314
spin_lock_irqsave(&rdev->ih.lock, flags);
33093315

33103316
if (rptr == wptr) {
33113317
spin_unlock_irqrestore(&rdev->ih.lock, flags);
33123318
return IRQ_NONE;
33133319
}
3314-
if (rdev->shutdown) {
3315-
spin_unlock_irqrestore(&rdev->ih.lock, flags);
3316-
return IRQ_NONE;
3317-
}
33183320

33193321
restart_ih:
33203322
/* display interrupts */

drivers/gpu/drm/radeon/radeon_atombios.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2607,6 +2607,10 @@ void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 v
26072607
if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
26082608
return;
26092609

2610+
/* 0xff01 is a flag rather then an actual voltage */
2611+
if (voltage_level == 0xff01)
2612+
return;
2613+
26102614
switch (crev) {
26112615
case 1:
26122616
args.v1.ucVoltageType = voltage_type;

drivers/gpu/drm/radeon/radeon_encoders.c

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1090,9 +1090,10 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
10901090
break;
10911091
}
10921092

1093-
if (is_dp)
1093+
if (is_dp) {
10941094
args.v2.acConfig.fCoherentMode = 1;
1095-
else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
1095+
args.v2.acConfig.fDPConnector = 1;
1096+
} else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
10961097
if (dig->coherent_mode)
10971098
args.v2.acConfig.fCoherentMode = 1;
10981099
if (radeon_encoder->pixel_clock > 165000)
@@ -1431,7 +1432,11 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
14311432
if (is_dig) {
14321433
switch (mode) {
14331434
case DRM_MODE_DPMS_ON:
1434-
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
1435+
/* some early dce3.2 boards have a bug in their transmitter control table */
1436+
if ((rdev->family == CHIP_RV710) || (rdev->family == CHIP_RV730))
1437+
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1438+
else
1439+
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
14351440
if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) {
14361441
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
14371442

drivers/gpu/drm/radeon/rv770.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,9 @@ void rv770_pm_misc(struct radeon_device *rdev)
105105
struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
106106

107107
if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
108+
/* 0xff01 is a flag rather then an actual voltage */
109+
if (voltage->voltage == 0xff01)
110+
return;
108111
if (voltage->voltage != rdev->pm.current_vddc) {
109112
radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
110113
rdev->pm.current_vddc = voltage->voltage;

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