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14 | 14 | #include <linux/netdevice.h>
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15 | 15 | #include <linux/phy.h>
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16 | 16 | #include <linux/phylink.h>
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| 17 | +#include <net/flow_offload.h> |
17 | 18 |
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18 | 19 | /* Fifo Registers */
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19 | 20 | #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
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126 | 127 | #define MVPP22_CLS_C2_TCAM_DATA4 0x1b20
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127 | 128 | #define MVPP22_CLS_C2_LU_TYPE(lu) ((lu) & 0x3f)
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128 | 129 | #define MVPP22_CLS_C2_PORT_ID(port) ((port) << 8)
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| 130 | +#define MVPP22_CLS_C2_PORT_MASK (0xff << 8) |
129 | 131 | #define MVPP22_CLS_C2_TCAM_INV 0x1b24
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130 | 132 | #define MVPP22_CLS_C2_TCAM_INV_BIT BIT(31)
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131 | 133 | #define MVPP22_CLS_C2_HIT_CTR 0x1b50
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134 | 136 | #define MVPP22_CLS_C2_ACT_FWD(act) (((act) & 0x7) << 13)
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135 | 137 | #define MVPP22_CLS_C2_ACT_QHIGH(act) (((act) & 0x3) << 11)
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136 | 138 | #define MVPP22_CLS_C2_ACT_QLOW(act) (((act) & 0x3) << 9)
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| 139 | +#define MVPP22_CLS_C2_ACT_COLOR(act) ((act) & 0x7) |
137 | 140 | #define MVPP22_CLS_C2_ATTR0 0x1b64
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138 | 141 | #define MVPP22_CLS_C2_ATTR0_QHIGH(qh) (((qh) & 0x1f) << 24)
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139 | 142 | #define MVPP22_CLS_C2_ATTR0_QHIGH_MASK 0x1f
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615 | 618 | #define MVPP2_BIT_IN_WORD(bit) ((bit) % 32)
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616 | 619 |
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617 | 620 | #define MVPP2_N_PRS_FLOWS 52
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| 621 | +#define MVPP2_N_RFS_ENTRIES_PER_FLOW 4 |
| 622 | + |
| 623 | +/* There are 7 supported high-level flows */ |
| 624 | +#define MVPP2_N_RFS_RULES (MVPP2_N_RFS_ENTRIES_PER_FLOW * 7) |
618 | 625 |
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619 | 626 | /* RSS constants */
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620 | 627 | #define MVPP22_RSS_TABLE_ENTRIES 32
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@@ -812,6 +819,37 @@ struct mvpp2_queue_vector {
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812 | 819 | struct cpumask *mask;
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813 | 820 | };
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814 | 821 |
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| 822 | +/* Internal represention of a Flow Steering rule */ |
| 823 | +struct mvpp2_rfs_rule { |
| 824 | + /* Rule location inside the flow*/ |
| 825 | + int loc; |
| 826 | + |
| 827 | + /* Flow type, such as TCP_V4_FLOW, IP6_FLOW, etc. */ |
| 828 | + int flow_type; |
| 829 | + |
| 830 | + /* Index of the C2 TCAM entry handling this rule */ |
| 831 | + int c2_index; |
| 832 | + |
| 833 | + /* Header fields that needs to be extracted to match this flow */ |
| 834 | + u16 hek_fields; |
| 835 | + |
| 836 | + /* CLS engine : only c2 is supported for now. */ |
| 837 | + u8 engine; |
| 838 | + |
| 839 | + /* TCAM key and mask for C2-based steering. These fields should be |
| 840 | + * encapsulated in a union should we add more engines. |
| 841 | + */ |
| 842 | + u64 c2_tcam; |
| 843 | + u64 c2_tcam_mask; |
| 844 | + |
| 845 | + struct flow_rule *flow; |
| 846 | +}; |
| 847 | + |
| 848 | +struct mvpp2_ethtool_fs { |
| 849 | + struct mvpp2_rfs_rule rule; |
| 850 | + struct ethtool_rxnfc rxnfc; |
| 851 | +}; |
| 852 | + |
815 | 853 | struct mvpp2_port {
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816 | 854 | u8 id;
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817 | 855 |
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@@ -883,6 +921,10 @@ struct mvpp2_port {
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883 | 921 |
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884 | 922 | /* RSS indirection table */
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885 | 923 | u32 indir[MVPP22_RSS_TABLE_ENTRIES];
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| 924 | + |
| 925 | + /* List of steering rules active on that port */ |
| 926 | + struct mvpp2_ethtool_fs *rfs_rules[MVPP2_N_RFS_RULES]; |
| 927 | + int n_rfs_rules; |
886 | 928 | };
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887 | 929 |
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888 | 930 | /* The mvpp2_tx_desc and mvpp2_rx_desc structures describe the
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