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pankajbansalnxpmarckleinebudde
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arm: dts: Add nodes for flexcan devices present on LS1021A-Rev2 SoC
This patch adds the device nodes for flexcan controller(s) present on LS1021A-Rev2 SoC. Signed-off-by: Pankaj Bansal <[email protected]> Signed-off-by: Bhupesh Sharma <[email protected]> Signed-off-by: Sakar Arora <[email protected]> Reviewed-by: Zhengxiong Jin <[email protected]> Reviewed-by: Poonam Aggrwal <[email protected]> Signed-off-by: Marc Kleine-Budde <[email protected]>
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arch/arm/boot/dts/ls1021a-qds.dts

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&uart1 {
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status = "okay";
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&can2 {
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status = "disabled";
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};
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&can3 {
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status = "disabled";
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};

arch/arm/boot/dts/ls1021a-twr.dts

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@@ -243,3 +243,19 @@
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&uart1 {
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status = "okay";
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&can2 {
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status = "disabled";
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};
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&can3 {
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status = "disabled";
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};

arch/arm/boot/dts/ls1021a.dtsi

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<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
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};
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can0: can@2a70000 {
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compatible = "fsl,ls1021ar2-flexcan";
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reg = <0x0 0x2a70000 0x0 0x1000>;
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interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>, <&clockgen 4 1>;
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clock-names = "ipg", "per";
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big-endian;
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};
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can1: can@2a80000 {
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compatible = "fsl,ls1021ar2-flexcan";
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reg = <0x0 0x2a80000 0x0 0x1000>;
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interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>, <&clockgen 4 1>;
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clock-names = "ipg", "per";
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big-endian;
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};
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can2: can@2a90000 {
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compatible = "fsl,ls1021ar2-flexcan";
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reg = <0x0 0x2a90000 0x0 0x1000>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>, <&clockgen 4 1>;
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clock-names = "ipg", "per";
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big-endian;
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};
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can3: can@2aa0000 {
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compatible = "fsl,ls1021ar2-flexcan";
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reg = <0x0 0x2aa0000 0x0 0x1000>;
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interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen 4 1>, <&clockgen 4 1>;
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clock-names = "ipg", "per";
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big-endian;
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};
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};
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};

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