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38 | 38 | #define PCF85063_CTRL2_AF BIT(6)
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39 | 39 | #define PCF85063_CTRL2_AIE BIT(7)
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40 | 40 |
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| 41 | +#define PCF85063_REG_RAM 0x03 |
| 42 | + |
41 | 43 | #define PCF85063_REG_SC 0x04 /* datetime */
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42 | 44 | #define PCF85063_REG_SC_OS 0x80
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43 | 45 |
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@@ -236,6 +238,18 @@ static const struct rtc_class_ops pcf85063_rtc_ops_alarm = {
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236 | 238 | .alarm_irq_enable = pcf85063_rtc_alarm_irq_enable,
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237 | 239 | };
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238 | 240 |
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| 241 | +static int pcf85063_nvmem_read(void *priv, unsigned int offset, |
| 242 | + void *val, size_t bytes) |
| 243 | +{ |
| 244 | + return regmap_read(priv, PCF85063_REG_RAM, val); |
| 245 | +} |
| 246 | + |
| 247 | +static int pcf85063_nvmem_write(void *priv, unsigned int offset, |
| 248 | + void *val, size_t bytes) |
| 249 | +{ |
| 250 | + return regmap_write(priv, PCF85063_REG_RAM, *(u8 *)val); |
| 251 | +} |
| 252 | + |
239 | 253 | static int pcf85063_load_capacitance(struct pcf85063 *pcf85063,
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240 | 254 | const struct device_node *np,
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241 | 255 | unsigned int force_cap)
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@@ -298,6 +312,13 @@ static int pcf85063_probe(struct i2c_client *client)
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298 | 312 | int err;
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299 | 313 | const struct pcf85063_config *config = &pcf85063tp_config;
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300 | 314 | const void *data = of_device_get_match_data(&client->dev);
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| 315 | + struct nvmem_config nvmem_cfg = { |
| 316 | + .name = "pcf85063_nvram", |
| 317 | + .reg_read = pcf85063_nvmem_read, |
| 318 | + .reg_write = pcf85063_nvmem_write, |
| 319 | + .type = NVMEM_TYPE_BATTERY_BACKED, |
| 320 | + .size = 1, |
| 321 | + }; |
301 | 322 |
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302 | 323 | dev_dbg(&client->dev, "%s\n", __func__);
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303 | 324 |
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@@ -354,6 +375,9 @@ static int pcf85063_probe(struct i2c_client *client)
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354 | 375 | }
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355 | 376 | }
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356 | 377 |
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| 378 | + nvmem_cfg.priv = pcf85063->regmap; |
| 379 | + rtc_nvmem_register(pcf85063->rtc, &nvmem_cfg); |
| 380 | + |
357 | 381 | return rtc_register_device(pcf85063->rtc);
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358 | 382 | }
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359 | 383 |
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