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chunkeeyherbertx
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crypto: crypto4xx - properly set IV after de- and encrypt
This patch fixes cts(cbc(aes)) test when cbc-aes-ppc4xx is used. alg: skcipher: Test 1 failed (invalid result) on encryption for cts(cbc-aes-ppc4xx) 00000000: 4b 10 75 fc 2f 14 1b 6a 27 35 37 33 d1 b7 70 05 00000010: 97 alg: skcipher: Failed to load transform for cts(cbc(aes)): -2 The CTS cipher mode expect the IV (req->iv) of skcipher_request to contain the last ciphertext block after the {en,de}crypt operation is complete. Fix this issue for the AMCC Crypto4xx hardware engine. The tcrypt test case for cts(cbc(aes)) is now correctly passed. name : cts(cbc(aes)) driver : cts(cbc-aes-ppc4xx) module : cts priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 16 min keysize : 16 max keysize : 32 ivsize : 16 chunksize : 16 walksize : 16 Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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drivers/crypto/amcc/crypto4xx_alg.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,8 @@ static int crypto4xx_setkey_aes(struct crypto_skcipher *cipher,
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/* Setup SA */
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sa = ctx->sa_in;
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set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, SA_NOT_SAVE_IV,
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set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, (cm == CRYPTO_MODE_CBC ?
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SA_SAVE_IV : SA_NOT_SAVE_IV),
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SA_LOAD_HASH_FROM_SA, SA_LOAD_IV_FROM_STATE,
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SA_NO_HEADER_PROC, SA_HASH_ALG_NULL,
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SA_CIPHER_ALG_AES, SA_PAD_TYPE_ZERO,

drivers/crypto/amcc/crypto4xx_core.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -545,6 +545,15 @@ static void crypto4xx_cipher_done(struct crypto4xx_device *dev,
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addr = dma_map_page(dev->core_dev->device, sg_page(dst),
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dst->offset, dst->length, DMA_FROM_DEVICE);
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}
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if (pd_uinfo->sa_va->sa_command_0.bf.save_iv == SA_SAVE_IV) {
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struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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crypto4xx_memcpy_from_le32((u32 *)req->iv,
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pd_uinfo->sr_va->save_iv,
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crypto_skcipher_ivsize(skcipher));
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}
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crypto4xx_ret_sg_desc(dev, pd_uinfo);
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if (pd_uinfo->state & PD_ENTRY_BUSY)

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