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dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
Add device tree bindings for SMU (System Management Unit) controller of Toshiba Visconti TMPV770x SoC series. Signed-off-by: Nobuhiro Iwamatsu <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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‎Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings
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maintainers:
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- Nobuhiro Iwamatsu <[email protected]>
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description:
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Toshia Visconti5 SMU (System Management Unit) which supports the clock
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and resets on TMPV770x.
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properties:
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compatible:
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items:
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- const: toshiba,tmpv7708-pismu
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- const: syscon
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pismu: syscon@24200000 {
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compatible = "toshiba,tmpv7708-pismu", "syscon";
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reg = <0 0x24200000 0 0x2140>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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};
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...

‎include/dt-bindings/clock/toshiba,tmpv770x.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_
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#define _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_
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/* PLL */
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#define TMPV770X_PLL_PIPLL0 0
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#define TMPV770X_PLL_PIPLL1 1
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#define TMPV770X_PLL_PIDNNPLL 2
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#define TMPV770X_PLL_PIETHERPLL 3
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#define TMPV770X_PLL_PIDDRCPLL 4
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#define TMPV770X_PLL_PIVOIFPLL 5
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#define TMPV770X_PLL_PIIMGERPLL 6
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#define TMPV770X_NR_PLL 7
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/* Clocks */
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#define TMPV770X_CLK_PIPLL1_DIV1 0
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#define TMPV770X_CLK_PIPLL1_DIV2 1
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#define TMPV770X_CLK_PIPLL1_DIV4 2
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#define TMPV770X_CLK_PIDNNPLL_DIV1 3
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#define TMPV770X_CLK_DDRC_PHY_PLL0 4
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#define TMPV770X_CLK_DDRC_PHY_PLL1 5
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#define TMPV770X_CLK_D_PHYPLL 6
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#define TMPV770X_CLK_PHY_PCIEPLL 7
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#define TMPV770X_CLK_CA53CL0 8
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#define TMPV770X_CLK_CA53CL1 9
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#define TMPV770X_CLK_PISDMAC 10
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#define TMPV770X_CLK_PIPDMAC0 11
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#define TMPV770X_CLK_PIPDMAC1 12
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#define TMPV770X_CLK_PIWRAM 13
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#define TMPV770X_CLK_DDRC0 14
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#define TMPV770X_CLK_DDRC0_SCLK 15
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#define TMPV770X_CLK_DDRC0_NCLK 16
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#define TMPV770X_CLK_DDRC0_MCLK 17
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#define TMPV770X_CLK_DDRC0_APBCLK 18
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#define TMPV770X_CLK_DDRC1 19
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#define TMPV770X_CLK_DDRC1_SCLK 20
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#define TMPV770X_CLK_DDRC1_NCLK 21
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#define TMPV770X_CLK_DDRC1_MCLK 22
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#define TMPV770X_CLK_DDRC1_APBCLK 23
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#define TMPV770X_CLK_HOX 24
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#define TMPV770X_CLK_PCIE_MSTR 25
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#define TMPV770X_CLK_PCIE_AUX 26
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#define TMPV770X_CLK_PIINTC 27
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#define TMPV770X_CLK_PIETHER_BUS 28
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#define TMPV770X_CLK_PISPI0 29
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#define TMPV770X_CLK_PISPI1 30
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#define TMPV770X_CLK_PISPI2 31
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#define TMPV770X_CLK_PISPI3 32
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#define TMPV770X_CLK_PISPI4 33
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#define TMPV770X_CLK_PISPI5 34
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#define TMPV770X_CLK_PISPI6 35
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#define TMPV770X_CLK_PIUART0 36
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#define TMPV770X_CLK_PIUART1 37
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#define TMPV770X_CLK_PIUART2 38
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#define TMPV770X_CLK_PIUART3 39
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#define TMPV770X_CLK_PII2C0 40
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#define TMPV770X_CLK_PII2C1 41
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#define TMPV770X_CLK_PII2C2 42
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#define TMPV770X_CLK_PII2C3 43
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#define TMPV770X_CLK_PII2C4 44
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#define TMPV770X_CLK_PII2C5 45
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#define TMPV770X_CLK_PII2C6 46
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#define TMPV770X_CLK_PII2C7 47
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#define TMPV770X_CLK_PII2C8 48
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#define TMPV770X_CLK_PIGPIO 49
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#define TMPV770X_CLK_PIPGM 50
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#define TMPV770X_CLK_PIPCMIF 51
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#define TMPV770X_CLK_PIPCMIF_AUDIO_O 52
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#define TMPV770X_CLK_PIPCMIF_AUDIO_I 53
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#define TMPV770X_CLK_PICMPT0 54
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#define TMPV770X_CLK_PICMPT1 55
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#define TMPV770X_CLK_PITSC 56
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#define TMPV770X_CLK_PIUWDT 57
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#define TMPV770X_CLK_PISWDT 58
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#define TMPV770X_CLK_WDTCLK 59
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#define TMPV770X_CLK_PISUBUS_150M 60
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#define TMPV770X_CLK_PISUBUS_300M 61
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#define TMPV770X_CLK_PIPMU 62
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#define TMPV770X_CLK_PIGPMU 63
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#define TMPV770X_CLK_PITMU 64
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#define TMPV770X_CLK_WRCK 65
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#define TMPV770X_CLK_PIEMM 66
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#define TMPV770X_CLK_PIMISC 67
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#define TMPV770X_CLK_PIGCOMM 68
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#define TMPV770X_CLK_PIDCOMM 69
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#define TMPV770X_CLK_PICKMON 70
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#define TMPV770X_CLK_PIMBUS 71
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#define TMPV770X_CLK_SBUSCLK 72
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#define TMPV770X_CLK_DDR0_APBCLKCLK 73
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#define TMPV770X_CLK_DDR1_APBCLKCLK 74
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#define TMPV770X_CLK_DSP0_PBCLK 75
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#define TMPV770X_CLK_DSP1_PBCLK 76
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#define TMPV770X_CLK_DSP2_PBCLK 77
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#define TMPV770X_CLK_DSP3_PBCLK 78
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#define TMPV770X_CLK_DSVIIF0_APBCLK 79
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#define TMPV770X_CLK_VIIF0_APBCLK 80
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#define TMPV770X_CLK_VIIF0_CFGCLK 81
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#define TMPV770X_CLK_VIIF1_APBCLK 82
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#define TMPV770X_CLK_VIIF1_CFGCLK 83
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#define TMPV770X_CLK_VIIF2_APBCLK 84
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#define TMPV770X_CLK_VIIF2_CFGCLK 85
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#define TMPV770X_CLK_VIIF3_APBCLK 86
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#define TMPV770X_CLK_VIIF3_CFGCLK 87
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#define TMPV770X_CLK_VIIF4_APBCLK 88
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#define TMPV770X_CLK_VIIF4_CFGCLK 89
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#define TMPV770X_CLK_VIIF5_APBCLK 90
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#define TMPV770X_CLK_VIIF5_CFGCLK 91
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#define TMPV770X_CLK_VOIF_SBUSCLK 92
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#define TMPV770X_CLK_VOIF_PROCCLK 93
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#define TMPV770X_CLK_VOIF_DPHYCFGCLK 94
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#define TMPV770X_CLK_DNN0 95
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#define TMPV770X_CLK_STMAT 96
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#define TMPV770X_CLK_HWA0 97
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#define TMPV770X_CLK_AFFINE0 98
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#define TMPV770X_CLK_HAMAT 99
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#define TMPV770X_CLK_SMLDB 100
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#define TMPV770X_CLK_HWA0_ASYNC 101
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#define TMPV770X_CLK_HWA2 102
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#define TMPV770X_CLK_FLMAT 103
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#define TMPV770X_CLK_PYRAMID 104
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#define TMPV770X_CLK_HWA2_ASYNC 105
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#define TMPV770X_CLK_DSP0 106
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#define TMPV770X_CLK_VIIFBS0 107
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#define TMPV770X_CLK_VIIFBS0_L2ISP 108
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#define TMPV770X_CLK_VIIFBS0_L1ISP 109
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#define TMPV770X_CLK_VIIFBS0_PROC 110
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#define TMPV770X_CLK_VIIFBS1 111
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#define TMPV770X_CLK_VIIFBS2 112
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#define TMPV770X_CLK_VIIFOP_MBUS 113
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#define TMPV770X_CLK_VIIFOP0_PROC 114
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#define TMPV770X_CLK_PIETHER_2P5M 115
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#define TMPV770X_CLK_PIETHER_25M 116
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#define TMPV770X_CLK_PIETHER_50M 117
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#define TMPV770X_CLK_PIETHER_125M 118
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#define TMPV770X_CLK_VOIF0_DPHYCFG 119
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#define TMPV770X_CLK_VOIF0_PROC 120
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#define TMPV770X_CLK_VOIF0_SBUS 121
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#define TMPV770X_CLK_VOIF0_DSIREF 122
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#define TMPV770X_CLK_VOIF0_PIXEL 123
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#define TMPV770X_CLK_PIREFCLK 124
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#define TMPV770X_CLK_SBUS 125
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#define TMPV770X_CLK_BUSLCK 126
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#define TMPV770X_NR_CLK 127
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/* Reset */
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#define TMPV770X_RESET_PIETHER_2P5M 0
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#define TMPV770X_RESET_PIETHER_25M 1
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#define TMPV770X_RESET_PIETHER_50M 2
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#define TMPV770X_RESET_PIETHER_125M 3
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#define TMPV770X_RESET_HOX 4
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#define TMPV770X_RESET_PCIE_MSTR 5
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#define TMPV770X_RESET_PCIE_AUX 6
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#define TMPV770X_RESET_PIINTC 7
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#define TMPV770X_RESET_PIETHER_BUS 8
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#define TMPV770X_RESET_PISPI0 9
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#define TMPV770X_RESET_PISPI1 10
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#define TMPV770X_RESET_PISPI2 11
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#define TMPV770X_RESET_PISPI3 12
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#define TMPV770X_RESET_PISPI4 13
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#define TMPV770X_RESET_PISPI5 14
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#define TMPV770X_RESET_PISPI6 15
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#define TMPV770X_RESET_PIUART0 16
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#define TMPV770X_RESET_PIUART1 17
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#define TMPV770X_RESET_PIUART2 18
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#define TMPV770X_RESET_PIUART3 19
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#define TMPV770X_RESET_PII2C0 20
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#define TMPV770X_RESET_PII2C1 21
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#define TMPV770X_RESET_PII2C2 22
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#define TMPV770X_RESET_PII2C3 23
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#define TMPV770X_RESET_PII2C4 24
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#define TMPV770X_RESET_PII2C5 25
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#define TMPV770X_RESET_PII2C6 26
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#define TMPV770X_RESET_PII2C7 27
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#define TMPV770X_RESET_PII2C8 28
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#define TMPV770X_RESET_PIPCMIF 29
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#define TMPV770X_RESET_PICKMON 30
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#define TMPV770X_RESET_SBUSCLK 31
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#define TMPV770X_NR_RESET 32
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#endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */

‎include/dt-bindings/reset/toshiba,tmpv770x.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef _DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_
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#define _DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_
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/* Reset */
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#define TMPV770X_RESET_PIETHER_2P5M 0
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#define TMPV770X_RESET_PIETHER_25M 1
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#define TMPV770X_RESET_PIETHER_50M 2
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#define TMPV770X_RESET_PIETHER_125M 3
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#define TMPV770X_RESET_HOX 4
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#define TMPV770X_RESET_PCIE_MSTR 5
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#define TMPV770X_RESET_PCIE_AUX 6
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#define TMPV770X_RESET_PIINTC 7
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#define TMPV770X_RESET_PIETHER_BUS 8
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#define TMPV770X_RESET_PISPI0 9
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#define TMPV770X_RESET_PISPI1 10
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#define TMPV770X_RESET_PISPI2 11
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#define TMPV770X_RESET_PISPI3 12
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#define TMPV770X_RESET_PISPI4 13
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#define TMPV770X_RESET_PISPI5 14
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#define TMPV770X_RESET_PISPI6 15
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#define TMPV770X_RESET_PIUART0 16
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#define TMPV770X_RESET_PIUART1 17
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#define TMPV770X_RESET_PIUART2 18
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#define TMPV770X_RESET_PIUART3 19
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#define TMPV770X_RESET_PII2C0 20
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#define TMPV770X_RESET_PII2C1 21
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#define TMPV770X_RESET_PII2C2 22
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#define TMPV770X_RESET_PII2C3 23
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#define TMPV770X_RESET_PII2C4 24
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#define TMPV770X_RESET_PII2C5 25
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#define TMPV770X_RESET_PII2C6 26
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#define TMPV770X_RESET_PII2C7 27
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#define TMPV770X_RESET_PII2C8 28
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#define TMPV770X_RESET_PIPCMIF 29
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#define TMPV770X_RESET_PICKMON 30
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#define TMPV770X_RESET_SBUSCLK 31
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#define TMPV770X_NR_RESET 32
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#endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */

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