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Allow to print JIT assemble without binary addresses (opcache.jit_debug=0x001) and with (opcache.jit_debug=0x401) for both ARM and x86.
1 parent 8ab1f6b commit f6df3b0

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2 files changed

+10
-4
lines changed

2 files changed

+10
-4
lines changed

ext/opcache/jit/zend_jit.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
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5454
#define ZEND_JIT_DEBUG_GDB (1<<8)
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#define ZEND_JIT_DEBUG_SIZE (1<<9)
56+
#define ZEND_JIT_DEBUG_ASM_ADDR (1<<10)
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5758
#define ZEND_JIT_DEBUG_TRACE_START (1<<12)
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#define ZEND_JIT_DEBUG_TRACE_STOP (1<<13)

ext/opcache/jit/zend_jit_disasm.c

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -445,13 +445,15 @@ static int zend_jit_disasm(const char *name,
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}
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# ifdef HAVE_CAPSTONE_ITER
448-
# if defined(__aarch64__)
449-
fprintf(stderr, " "ZEND_XLONG_FMT":\t%s ", insn->address, insn->mnemonic);
450-
# else
448+
if (JIT_G(debug) & ZEND_JIT_DEBUG_ASM_ADDR) {
449+
fprintf(stderr, " "ZEND_XLONG_FMT":", insn->address);
450+
}
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fprintf(stderr, "\t%s ", insn->mnemonic);
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# endif
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p = insn->op_str;
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# else
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if (JIT_G(debug) & ZEND_JIT_DEBUG_ASM_ADDR) {
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fprintf(stderr, " "ZEND_XLONG_FMT":", insn[i].address);
456+
}
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fprintf(stderr, "\t%s ", insn[i].mnemonic);
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p = insn[i].op_str;
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# endif
@@ -551,6 +553,9 @@ static int zend_jit_disasm(const char *name,
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}
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}
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}
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if (JIT_G(debug) & ZEND_JIT_DEBUG_ASM_ADDR) {
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fprintf(stderr, " "ZEND_XLONG_FMT":", ud_insn_off(&ud));
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}
554559
fprintf(stderr, "\t%s\n", ud_insn_asm(&ud));
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}
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#endif

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