@@ -24,7 +24,14 @@ static std::vector<uint64_t> ethosu_pmuEventCounts(
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ETHOSU_PMU_Get_NumEventCounters (),
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0);
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+ #if defined(ETHOSU55) || defined(ETHOSU65)
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static const uint32_t ethosu_pmuCountersUsed = 4 ;
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+ #elif defined(ETHOSU85)
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+ static const uint32_t ethosu_pmuCountersUsed = 5 ;
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+ #else
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+ #error No NPU target defined
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+ #endif
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+
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// ethosu_pmuCountersUsed should match numbers of counters setup in
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// ethosu_inference_begin() and not be more then the HW supports
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static_assert (ETHOSU_PMU_NCOUNTERS >= ethosu_pmuCountersUsed);
@@ -44,18 +51,26 @@ void ethosu_inference_begin(struct ethosu_driver* drv, void*) {
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ETHOSU_PMU_Set_EVTYPER (drv, 1 , ETHOSU_PMU_AXI1_RD_DATA_BEAT_RECEIVED);
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ETHOSU_PMU_Set_EVTYPER (drv, 2 , ETHOSU_PMU_AXI0_WR_DATA_BEAT_WRITTEN);
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ETHOSU_PMU_Set_EVTYPER (drv, 3 , ETHOSU_PMU_NPU_IDLE);
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+ // Enable the 4 counters
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+ ETHOSU_PMU_CNTR_Enable (
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+ drv,
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+ ETHOSU_PMU_CNT1_Msk | ETHOSU_PMU_CNT2_Msk | ETHOSU_PMU_CNT3_Msk |
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+ ETHOSU_PMU_CNT4_Msk);
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#elif defined(ETHOSU85)
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- ETHOSU_PMU_Set_EVTYPER (drv, 0 , ETHOSU_PMU_EXT0_RD_DATA_BEAT_RECEIVED);
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- ETHOSU_PMU_Set_EVTYPER (drv, 1 , ETHOSU_PMU_EXT1_RD_DATA_BEAT_RECEIVED);
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- ETHOSU_PMU_Set_EVTYPER (drv, 2 , ETHOSU_PMU_EXT0_WR_DATA_BEAT_WRITTEN);
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- ETHOSU_PMU_Set_EVTYPER (drv, 3 , ETHOSU_PMU_NPU_IDLE);
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+ ETHOSU_PMU_Set_EVTYPER (drv, 0 , ETHOSU_PMU_SRAM_RD_DATA_BEAT_RECEIVED);
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+ ETHOSU_PMU_Set_EVTYPER (drv, 1 , ETHOSU_PMU_SRAM_WR_DATA_BEAT_WRITTEN);
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+ ETHOSU_PMU_Set_EVTYPER (drv, 2 , ETHOSU_PMU_EXT_RD_DATA_BEAT_RECEIVED);
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+ ETHOSU_PMU_Set_EVTYPER (drv, 3 , ETHOSU_PMU_EXT_WR_DATA_BEAT_WRITTEN);
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+ ETHOSU_PMU_Set_EVTYPER (drv, 4 , ETHOSU_PMU_NPU_IDLE);
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+ // Enable the 5 counters
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+ ETHOSU_PMU_CNTR_Enable (
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+ drv,
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+ ETHOSU_PMU_CNT1_Msk | ETHOSU_PMU_CNT2_Msk | ETHOSU_PMU_CNT3_Msk |
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+ ETHOSU_PMU_CNT4_Msk | ETHOSU_PMU_CNT5_Msk);
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#else
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#error No NPU target defined
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#endif
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- // Enable 4 counters
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- ETHOSU_PMU_CNTR_Enable (drv, 0xf );
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-
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ETHOSU_PMU_CNTR_Enable (drv, ETHOSU_PMU_CCNT_Msk);
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ETHOSU_PMU_CYCCNT_Reset (drv);
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@@ -177,7 +192,7 @@ void StopMeasurements() {
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#elif defined(ETHOSU85)
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ET_LOG (
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Info,
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- " Ethos-U PMU Events:[ETHOSU_PMU_EXT0_RD_DATA_BEAT_RECEIVED, ETHOSU_PMU_EXT1_RD_DATA_BEAT_RECEIVED, ETHOSU_PMU_EXT0_WR_DATA_BEAT_WRITTEN , ETHOSU_PMU_NPU_IDLE]" );
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+ " Ethos-U PMU Events:[ETHOSU_PMU_SRAM_RD_DATA_BEAT_RECEIVED, ETHOSU_PMU_SRAM_WR_DATA_BEAT_WRITTEN, ETHOSU_PMU_EXT_RD_DATA_BEAT_RECEIVED, ETHOSU_PMU_EXT_WR_DATA_BEAT_WRITTEN , ETHOSU_PMU_NPU_IDLE]" );
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#else
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#error No NPU target defined
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#endif
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