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Add util to find out # of performant cores (#2350)
Summary: Pull Request resolved: #2350 This helps with identifying the # of performant cores which will later be used when reseting the threadpool or using the guard to figure out how many threads should be used //unrelated failures github-bypass-export-checks ghstack-source-id: 218812793 exported-using-ghexport Reviewed By: digantdesai, kirklandsign Differential Revision: D54766068 fbshipit-source-id: 5bba8d763ccd414a897c477e6e49f7ed0159bf05
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‎backends/xnnpack/threadpool/cpuinfo_utils.cpp

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/*
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* Copyright (c) Meta Platforms, Inc. and affiliates.
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* All rights reserved.
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*
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* This source code is licensed under the BSD-style license found in the
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* LICENSE file in the root directory of this source tree.
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*/
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#include <executorch/runtime/platform/assert.h>
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#include <fstream>
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#include <mutex>
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#include <string>
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#include <vector>
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#include "cpuinfo_utils.h"
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namespace torch {
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namespace executorch {
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namespace cpuinfo {
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// Ignore revisions (last digit (4 LSBs))
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#define CPUINFO_ARM_MIDR_CORTEX_A520 UINT32_C(0x410FD800)
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#define CPUINFO_ARM_MIDR_CORTEX_A53 UINT32_C(0x410FD030)
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#define CPUINFO_ARM_MIDR_CORTEX_A55 UINT32_C(0x410FD050)
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#define CPUINFO_ARM_MIDR_CORTEX_A57 UINT32_C(0x410FD070)
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#define RIVISION_MASK UINT32_C(0xFFFFFFF0)
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namespace {
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bool is_non_performant_core(const struct cpuinfo_uarch_info* uarch_info) {
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switch (uarch_info->uarch) {
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case cpuinfo_uarch_cortex_a55:
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case cpuinfo_uarch_cortex_a53:
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case cpuinfo_uarch_cortex_a510:
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return true;
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// This can be so many other cores.
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// Need to update this to better account for slow cores
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// Also does not account Apple's A/M series cores
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// And not yet qcomm's
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default:
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break;
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}
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// A520 is not yet updated in cpuinfo
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// Hence decode it separately.
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#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
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if ((uarch_info->midr & RIVISION_MASK) == CPUINFO_ARM_MIDR_CORTEX_A520) {
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return true;
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}
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#endif
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return false;
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}
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std::vector<uint32_t>* get_static_cpu_midr_vector() {
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static std::vector<uint32_t> cpu_midrs;
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return &cpu_midrs;
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}
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uint32_t _get_model_specific_num_cores() {
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// Not sure how reliable this is but going with it for now.
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const std::string kImageVersionPath = "/sys/devices/soc0/image_version";
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ET_LOG(Info, "Reading file %s", kImageVersionPath.c_str());
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std::fstream image_version_file(kImageVersionPath, std::ios_base::in);
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if (image_version_file.is_open()) {
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std::string x;
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std::getline(image_version_file, x);
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// Hardcoding some rules for now
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if (x.find("S911") != std::string::npos) {
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// Samsung S23 has:
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// 1x3.36 GHz Cortex-X3
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// 2x2.8 GHz Cortex-A715
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// 2x2.8 GHz Cortex-A710
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// 3x2.0 GHz Cortex-A510
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// And we have balanced execution with 4 cores.
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return 4;
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}
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}
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ET_LOG(Info, "Failed to open midr file %s", kImageVersionPath.c_str());
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return 0;
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}
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bool populate_available_cpu_mids() {
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std::vector<uint32_t>* cpu_midrs = get_static_cpu_midr_vector();
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uint32_t num_possible_cores = cpuinfo_get_processors_count();
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cpu_midrs->resize(num_possible_cores);
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const std::string kMidrFilePathPrefix = "/sys/devices/system/cpu/cpu";
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const std::string kMidrFilePathSuffix = "/regs/identification/midr_el1";
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for (int32_t i = 0; i < num_possible_cores; ++i) {
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std::string midr_file_path =
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kMidrFilePathPrefix + std::to_string(i) + kMidrFilePathSuffix;
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ET_LOG(Info, "Reading file %s", midr_file_path.c_str());
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std::fstream midr_file(midr_file_path, std::ios_base::in);
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uint32_t tmp{0};
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if (midr_file.is_open()) {
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std::string x;
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std::getline(midr_file, x);
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tmp = std::stoi(x, nullptr, 16);
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(*cpu_midrs)[i] = tmp;
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} else {
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ET_LOG(Info, "Failed to open midr file %s", midr_file_path.c_str());
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cpu_midrs->clear();
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return false;
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}
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}
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return true;
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}
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uint32_t _get_num_performant_cores() {
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// @lint-ignore CLANGTIDY facebook-hte-std::once_flag
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static std::once_flag flag;
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// @lint-ignore CLANGTIDY facebook-hte-std::call_once
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std::call_once(flag, []() { populate_available_cpu_mids(); });
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std::vector<uint32_t>* cpu_midrs = get_static_cpu_midr_vector();
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uint32_t num_possible_cores = cpuinfo_get_processors_count();
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if (num_possible_cores != cpu_midrs->size()) {
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ET_LOG(Info, "CPU info and manual query on # of cpus dont match.");
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return 0;
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}
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for (int32_t i = 0; i < cpu_midrs->size(); ++i) {
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uint32_t masked_midr = (*cpu_midrs)[i] & RIVISION_MASK;
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switch (masked_midr) {
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case CPUINFO_ARM_MIDR_CORTEX_A520:
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case CPUINFO_ARM_MIDR_CORTEX_A53:
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case CPUINFO_ARM_MIDR_CORTEX_A55:
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case CPUINFO_ARM_MIDR_CORTEX_A57:
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num_possible_cores--;
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break;
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default:
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break;
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}
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}
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return num_possible_cores;
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}
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} // namespace
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uint32_t get_num_performant_cores() {
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ET_CHECK_MSG(cpuinfo_initialize(), "cpuinfo cannot be initialized.");
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// First try and see if we have number of cores profiled for this specific
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// device
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uint32_t model_specific_num_cores = _get_model_specific_num_cores();
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if (model_specific_num_cores > 0) {
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return model_specific_num_cores;
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}
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// Else looks at either the # of litte cores if found
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// Or parse the midr in "Something seems wrong" section.
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const uint32_t uarch_count = cpuinfo_get_uarchs_count();
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uint32_t num_possible_cores = cpuinfo_get_processors_count();
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uint32_t num_non_performant_core = 0;
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if (uarch_count > 1) {
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for (int32_t i = 0; i < uarch_count; ++i) {
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const struct cpuinfo_uarch_info* uarch_info = cpuinfo_get_uarch(i);
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if (is_non_performant_core(uarch_info)) {
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num_non_performant_core += uarch_info->processor_count;
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}
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}
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ET_LOG(Info, "Number of efficient cores %d", num_non_performant_core);
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if (num_possible_cores <= num_non_performant_core) {
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ET_LOG(
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Info, "Total number of cores must be larger than efficient cores.");
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return 0;
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}
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return (num_possible_cores - num_non_performant_core);
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} else {
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// Something seems wrong. Lets check each processor's midr
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// In one plua 12 while it has 2 little cores, the topology
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// reported in /sys/devices/system/cpu/cpu* /topology/core_siblings_list
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// report wrong topology which results in wront configratuon
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return _get_num_performant_cores();
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}
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}
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} // namespace cpuinfo
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} // namespace executorch
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} // namespace torch

‎backends/xnnpack/threadpool/cpuinfo_utils.h

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/*
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* Copyright (c) Meta Platforms, Inc. and affiliates.
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* All rights reserved.
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*
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* This source code is licensed under the BSD-style license found in the
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* LICENSE file in the root directory of this source tree.
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*/
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#pragma once
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#include <cpuinfo.h>
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namespace torch {
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namespace executorch {
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namespace cpuinfo {
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uint32_t get_num_performant_cores();
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} // namespace cpuinfo
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} // namespace executorch
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} // namespace torch

‎backends/xnnpack/threadpool/targets.bzl

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"@EXECUTORCH_CLIENTS",
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],
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)
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runtime.cxx_library(
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name = "cpuinfo_utils",
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srcs = [
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"cpuinfo_utils.cpp",
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],
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deps = [
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"//executorch/runtime/core:core",
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],
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exported_headers = [
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"cpuinfo_utils.h",
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],
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exported_deps = [
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third_party_dep("pthreadpool"),
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third_party_dep("cpuinfo"),
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],
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visibility = [
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"//executorch/...",
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"//executorch/backends/...",
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"//executorch/runtime/backend/...",
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"//executorch/extension/threadpool/test/...",
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"@EXECUTORCH_CLIENTS",
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],
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)

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