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[Target] Prevent copying in loop variables (NFC)
/data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct] for (const auto [Reg, N] : RegsToPass) { ^ /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying for (const auto [Reg, N] : RegsToPass) { ^~~~~~~~~~~~~~~~~~~~~ & /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair<unsigned int, llvm::SDValue> const' [-Werror,-Wrange-loop-construct] for (const auto [Reg, N] : RegsToPass) ^ /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:8: note: use reference type 'std::pair<unsigned int, llvm::SDValue> const &' to prevent copying for (const auto [Reg, N] : RegsToPass) ^~~~~~~~~~~~~~~~~~~~~ & 2 errors generated.
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-8
lines changed

4 files changed

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llvm/lib/Target/Lanai/LanaiISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -712,7 +712,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
712712
// Build a sequence of copy-to-reg nodes chained together with token chain and
713713
// flag operands which copy the outgoing args into registers. The InGlue in
714714
// necessary since all emitted instructions must be stuck together.
715-
for (const auto [Reg, N] : RegsToPass) {
715+
for (const auto &[Reg, N] : RegsToPass) {
716716
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
717717
InGlue = Chain.getValue(1);
718718
}
@@ -744,7 +744,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
744744

745745
// Add argument registers to the end of the list so that they are
746746
// known live into the call.
747-
for (const auto [Reg, N] : RegsToPass)
747+
for (const auto &[Reg, N] : RegsToPass)
748748
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
749749

750750
if (InGlue.getNode())

llvm/lib/Target/MSP430/MSP430ISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -768,7 +768,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
768768
// flag operands which copy the outgoing args into registers. The InGlue in
769769
// necessary since all emitted instructions must be stuck together.
770770
SDValue InGlue;
771-
for (const auto [Reg, N] : RegsToPass) {
771+
for (const auto &[Reg, N] : RegsToPass) {
772772
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
773773
InGlue = Chain.getValue(1);
774774
}
@@ -789,7 +789,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
789789

790790
// Add argument registers to the end of the list so that they are
791791
// known live into the call.
792-
for (const auto [Reg, N] : RegsToPass)
792+
for (const auto &[Reg, N] : RegsToPass)
793793
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
794794

795795
if (InGlue.getNode())

llvm/lib/Target/VE/VEISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -738,15 +738,15 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
738738
// necessary since all emitted instructions must be stuck together in order
739739
// to pass the live physical registers.
740740
SDValue InGlue;
741-
for (const auto [Reg, N] : RegsToPass) {
741+
for (const auto &[Reg, N] : RegsToPass) {
742742
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
743743
InGlue = Chain.getValue(1);
744744
}
745745

746746
// Build the operands for the call instruction itself.
747747
SmallVector<SDValue, 8> Ops;
748748
Ops.push_back(Chain);
749-
for (const auto [Reg, N] : RegsToPass)
749+
for (const auto &[Reg, N] : RegsToPass)
750750
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
751751

752752
// Add a register mask operand representing the call-preserved registers.

llvm/lib/Target/XCore/XCoreISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1064,7 +1064,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
10641064
// The InGlue in necessary since all emitted instructions must be
10651065
// stuck together.
10661066
SDValue InGlue;
1067-
for (const auto [Reg, N] : RegsToPass) {
1067+
for (const auto &[Reg, N] : RegsToPass) {
10681068
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
10691069
InGlue = Chain.getValue(1);
10701070
}
@@ -1088,7 +1088,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
10881088

10891089
// Add argument registers to the end of the list so that they are
10901090
// known live into the call.
1091-
for (const auto [Reg, N] : RegsToPass)
1091+
for (const auto &[Reg, N] : RegsToPass)
10921092
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
10931093

10941094
if (InGlue.getNode())

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