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kazutakahiratarlavaee
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[Target] Use range-based for loops (NFC) (llvm#146277)
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4 files changed

+16
-24
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4 files changed

+16
-24
lines changed

llvm/lib/Target/Lanai/LanaiISelLowering.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -712,9 +712,8 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
712712
// Build a sequence of copy-to-reg nodes chained together with token chain and
713713
// flag operands which copy the outgoing args into registers. The InGlue in
714714
// necessary since all emitted instructions must be stuck together.
715-
for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
716-
Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
717-
RegsToPass[I].second, InGlue);
715+
for (const auto [Reg, N] : RegsToPass) {
716+
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
718717
InGlue = Chain.getValue(1);
719718
}
720719

@@ -745,9 +744,8 @@ SDValue LanaiTargetLowering::LowerCCCCallTo(
745744

746745
// Add argument registers to the end of the list so that they are
747746
// known live into the call.
748-
for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
749-
Ops.push_back(DAG.getRegister(RegsToPass[I].first,
750-
RegsToPass[I].second.getValueType()));
747+
for (const auto [Reg, N] : RegsToPass)
748+
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
751749

752750
if (InGlue.getNode())
753751
Ops.push_back(InGlue);

llvm/lib/Target/MSP430/MSP430ISelLowering.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -768,9 +768,8 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
768768
// flag operands which copy the outgoing args into registers. The InGlue in
769769
// necessary since all emitted instructions must be stuck together.
770770
SDValue InGlue;
771-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
772-
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
773-
RegsToPass[i].second, InGlue);
771+
for (const auto [Reg, N] : RegsToPass) {
772+
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
774773
InGlue = Chain.getValue(1);
775774
}
776775

@@ -790,9 +789,8 @@ SDValue MSP430TargetLowering::LowerCCCCallTo(
790789

791790
// Add argument registers to the end of the list so that they are
792791
// known live into the call.
793-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
794-
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
795-
RegsToPass[i].second.getValueType()));
792+
for (const auto [Reg, N] : RegsToPass)
793+
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
796794

797795
if (InGlue.getNode())
798796
Ops.push_back(InGlue);

llvm/lib/Target/VE/VEISelLowering.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -738,18 +738,16 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
738738
// necessary since all emitted instructions must be stuck together in order
739739
// to pass the live physical registers.
740740
SDValue InGlue;
741-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
742-
Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first,
743-
RegsToPass[i].second, InGlue);
741+
for (const auto [Reg, N] : RegsToPass) {
742+
Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue);
744743
InGlue = Chain.getValue(1);
745744
}
746745

747746
// Build the operands for the call instruction itself.
748747
SmallVector<SDValue, 8> Ops;
749748
Ops.push_back(Chain);
750-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
751-
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
752-
RegsToPass[i].second.getValueType()));
749+
for (const auto [Reg, N] : RegsToPass)
750+
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
753751

754752
// Add a register mask operand representing the call-preserved registers.
755753
const VERegisterInfo *TRI = Subtarget->getRegisterInfo();

llvm/lib/Target/XCore/XCoreISelLowering.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1064,9 +1064,8 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
10641064
// The InGlue in necessary since all emitted instructions must be
10651065
// stuck together.
10661066
SDValue InGlue;
1067-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
1068-
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1069-
RegsToPass[i].second, InGlue);
1067+
for (const auto [Reg, N] : RegsToPass) {
1068+
Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue);
10701069
InGlue = Chain.getValue(1);
10711070
}
10721071

@@ -1089,9 +1088,8 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
10891088

10901089
// Add argument registers to the end of the list so that they are
10911090
// known live into the call.
1092-
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
1093-
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1094-
RegsToPass[i].second.getValueType()));
1091+
for (const auto [Reg, N] : RegsToPass)
1092+
Ops.push_back(DAG.getRegister(Reg, N.getValueType()));
10951093

10961094
if (InGlue.getNode())
10971095
Ops.push_back(InGlue);

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