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Commit 37e6543

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Dániel Buga
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Add missing #[inline]s
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src/register/fpscr.rs

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@ impl Fpscr {
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}
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/// Sets the Negative condition code flag
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#[inline]
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pub fn set_n(&mut self, n: bool) {
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let mask = 1 << 31;
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match n {
@@ -42,6 +43,7 @@ impl Fpscr {
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}
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/// Sets the Zero condition code flag
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#[inline]
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pub fn set_z(&mut self, z: bool) {
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let mask = 1 << 30;
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match z {
@@ -57,6 +59,7 @@ impl Fpscr {
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}
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/// Sets the Carry condition code flag
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#[inline]
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pub fn set_c(&mut self, c: bool) {
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let mask = 1 << 29;
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match c {
@@ -72,6 +75,7 @@ impl Fpscr {
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}
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/// Sets the Zero condition code flag
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#[inline]
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pub fn set_v(&mut self, v: bool) {
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let mask = 1 << 28;
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match v {
@@ -87,6 +91,7 @@ impl Fpscr {
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}
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/// Sets the Alternative Half Precision bit
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#[inline]
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pub fn set_ahp(&mut self, ahp: bool) {
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let mask = 1 << 26;
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match ahp {
@@ -102,6 +107,7 @@ impl Fpscr {
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}
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/// Sets the Default NaN mode bit
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#[inline]
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pub fn set_dn(&mut self, dn: bool) {
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let mask = 1 << 25;
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match dn {
@@ -117,6 +123,7 @@ impl Fpscr {
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}
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/// Sets the Flush to Zero mode bit
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#[inline]
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pub fn set_fz(&mut self, fz: bool) {
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let mask = 1 << 24;
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match fz {
@@ -137,6 +144,7 @@ impl Fpscr {
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}
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/// Sets the Rounding Mode control field
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#[inline]
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pub fn set_rmode(&mut self, rmode: RMode) {
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let mask = 3 << 22;
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match rmode {
@@ -154,6 +162,7 @@ impl Fpscr {
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}
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/// Sets the Input Denormal cumulative exception bit
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#[inline]
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pub fn set_idc(&mut self, idc: bool) {
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let mask = 1 << 7;
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match idc {
@@ -169,6 +178,7 @@ impl Fpscr {
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}
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/// Sets the Inexact cumulative exception bit
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#[inline]
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pub fn set_ixc(&mut self, ixc: bool) {
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let mask = 1 << 4;
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match ixc {
@@ -184,6 +194,7 @@ impl Fpscr {
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}
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/// Sets the Underflow cumulative exception bit
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#[inline]
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pub fn set_ufc(&mut self, ufc: bool) {
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let mask = 1 << 3;
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match ufc {
@@ -199,6 +210,7 @@ impl Fpscr {
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}
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/// Sets the Overflow cumulative exception bit
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#[inline]
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pub fn set_ofc(&mut self, ofc: bool) {
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let mask = 1 << 2;
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match ofc {
@@ -214,6 +226,7 @@ impl Fpscr {
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}
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/// Sets the Division by Zero cumulative exception bit
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#[inline]
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pub fn set_dzc(&mut self, dzc: bool) {
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let mask = 1 << 1;
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match dzc {
@@ -229,6 +242,7 @@ impl Fpscr {
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}
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/// Sets the Invalid Operation cumulative exception bit
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#[inline]
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pub fn set_ioc(&mut self, ioc: bool) {
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let mask = 1 << 0;
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match ioc {

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