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Fix typo
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src/peripheral/dcb.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ use volatile_register::{RW, WO};
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use peripheral::DCB;
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7-
const BIT_TRACENA: u32 = 0x01 << 24;
7+
const BIT_TRCENA: u32 = 0x01 << 24;
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/// Register block
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#[repr(C)]
@@ -25,13 +25,13 @@ impl DCB {
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/// As by STM documentation, this flag is not reset on
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/// soft-reset, only on power reset.
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pub fn enable_trace(&mut self) {
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// set bit 24 / TRACENA
29-
unsafe { self.demcr.modify(|w| w | BIT_TRACENA); }
28+
// set bit 24 / TRCENA
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unsafe { self.demcr.modify(|w| w | BIT_TRCENA); }
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}
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/// Disables TRACE. See `DCB::enable_trace()` for more details
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pub fn disable_trace(&mut self) {
34-
// unset bit 24 / TRACENA
35-
unsafe { self.demcr.modify(|w| w & !BIT_TRACENA); }
34+
// unset bit 24 / TRCENA
35+
unsafe { self.demcr.modify(|w| w & !BIT_TRCENA); }
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}
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}

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