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lines changed Original file line number Diff line number Diff line change 1
- #[ cfg( all( cortex_m, feature = "critical-section-single-core" ) ) ]
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- mod single_core_critical_section {
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- use critical_section:: { set_impl, Impl , RawRestoreState } ;
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+ use critical_section:: { set_impl, Impl , RawRestoreState } ;
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- use crate :: interrupt;
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- use crate :: register:: primask;
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+ use crate :: interrupt;
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+ use crate :: register:: primask;
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- struct SingleCoreCriticalSection ;
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- set_impl ! ( SingleCoreCriticalSection ) ;
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+ struct SingleCoreCriticalSection ;
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+ set_impl ! ( SingleCoreCriticalSection ) ;
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- unsafe impl Impl for SingleCoreCriticalSection {
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- unsafe fn acquire ( ) -> RawRestoreState {
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- let was_active = primask:: read ( ) . is_active ( ) ;
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- interrupt:: disable ( ) ;
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- was_active
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- }
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+ unsafe impl Impl for SingleCoreCriticalSection {
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+ unsafe fn acquire ( ) -> RawRestoreState {
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+ let was_active = primask:: read ( ) . is_active ( ) ;
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+ interrupt:: disable ( ) ;
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+ was_active
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+ }
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- unsafe fn release ( was_active : RawRestoreState ) {
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- // Only re-enable interrupts if they were enabled before the critical section.
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- if was_active {
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- interrupt:: enable ( )
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- }
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+ unsafe fn release ( was_active : RawRestoreState ) {
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+ // Only re-enable interrupts if they were enabled before the critical section.
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+ if was_active {
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+ interrupt:: enable ( )
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}
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}
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}
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-
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- pub use critical_section:: with;
Original file line number Diff line number Diff line change 9
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//!
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//! # Optional features
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//!
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+ //! ## `critical-section-single-core`
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+ //!
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+ //! This feature enables a [`critical-section`](https://github.com/rust-embedded/critical-section)
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+ //! implementation suitable for single-core targets, based on disabling interrupts globally.
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+ //!
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+ //! It is **unsound** to enable it on multi-core targets or for code running in unprivileged mode,
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+ //! and may cause functional problems in systems where some interrupts must be not be disabled
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+ //! or critical sections are managed as part of an RTOS. In these cases, you should use
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+ //! a target-specific implementation instead, typically provided by a HAL or RTOS crate.
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+ //!
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//! ## `cm7-r0p1`
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//!
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//! This feature enables workarounds for errata found on Cortex-M7 chips with revision r0p1. Some
@@ -49,10 +59,6 @@ mod macros;
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pub mod asm;
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#[ cfg( armv8m) ]
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pub mod cmse;
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- // This is only public so the `singleton` macro does not require depending on
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- // the `critical-section` crate separately.
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- #[ doc( hidden) ]
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- pub mod critical_section;
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pub mod delay;
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pub mod interrupt;
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#[ cfg( all( not( armv6m) , not( armv8m_base) ) ) ]
@@ -61,3 +67,13 @@ pub mod peripheral;
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pub mod register;
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pub use crate :: peripheral:: Peripherals ;
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+
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+ #[ cfg( all( cortex_m, feature = "critical-section-single-core" ) ) ]
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+ mod critical_section;
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+
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+ /// Used to reexport items for use in macros. Do not use directly.
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+ /// Not covered by semver guarantees.
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+ #[ doc( hidden) ]
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+ pub mod _export {
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+ pub use critical_section;
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+ }
Original file line number Diff line number Diff line change @@ -31,7 +31,10 @@ macro_rules! iprintln {
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/// at most once in the whole lifetime of the program.
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///
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/// # Notes
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- /// This macro is unsound on multi core systems.
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+ ///
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+ /// This macro requires a `critical-section` implementation to be set. For most single core systems,
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+ /// you can enable the `critical-section-single-core` feature for this crate. For other systems, you
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+ /// have to provide one from elsewhere, typically your chip's HAL crate.
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///
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/// For debuggability, you can set an explicit name for a singleton. This name only shows up the
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/// the debugger and is not referencable from other code. See example below.
@@ -62,7 +65,7 @@ macro_rules! iprintln {
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#[ macro_export]
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macro_rules! singleton {
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( $name: ident: $ty: ty = $expr: expr) => {
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- $crate:: critical_section:: with( |_| {
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+ $crate:: _export :: critical_section:: with( |_| {
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// this is a tuple of a MaybeUninit and a bool because using an Option here is
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// problematic: Due to niche-optimization, an Option could end up producing a non-zero
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// initializer value which would move the entire static from `.bss` into `.data`...
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