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Merge pull request #142 from rust-embedded/0.5.9
New 0.5.9 which re-exports the CORE_PERIPHERALS static from 0.6.0
2 parents 8fd4547 + 5d65685 commit e2e3ecf

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5 files changed

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-473
lines changed

5 files changed

+53
-473
lines changed

Cargo.toml

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,14 @@ keywords = ["arm", "cortex-m", "register", "peripheral"]
77
license = "MIT OR Apache-2.0"
88
name = "cortex-m"
99
readme = "README.md"
10-
repository = "https://github.com/japaric/cortex-m"
11-
version = "0.5.8"
10+
repository = "https://github.com/rust-embedded/cortex-m"
11+
version = "0.5.9"
1212

1313
[dependencies]
1414
aligned = "0.2.0"
1515
bare-metal = "0.2.0"
1616
volatile-register = "0.2.0"
17+
cortex_m_0_6 = { package = "cortex-m", version = "0.6.0" }
1718

1819
[features]
1920
cm7-r0p1 = []

src/lib.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -37,15 +37,15 @@
3737
extern crate aligned;
3838
extern crate bare_metal;
3939
extern crate volatile_register;
40+
extern crate cortex_m_0_6;
4041

4142
#[macro_use]
4243
mod macros;
4344

44-
pub mod asm;
45-
pub mod interrupt;
45+
pub use cortex_m_0_6::{asm, interrupt, register};
4646
#[cfg(not(armv6m))]
47-
pub mod itm;
47+
pub use cortex_m_0_6::itm;
48+
4849
pub mod peripheral;
49-
pub mod register;
5050

5151
pub use peripheral::Peripherals;

src/peripheral/dwt.rs

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -32,17 +32,7 @@ pub struct RegisterBlock {
3232
pub lsr: RO<u32>,
3333
}
3434

35-
/// Comparator
36-
#[repr(C)]
37-
pub struct Comparator {
38-
/// Comparator
39-
pub comp: RW<u32>,
40-
/// Comparator Mask
41-
pub mask: RW<u32>,
42-
/// Comparator Function
43-
pub function: RW<u32>,
44-
reserved: u32,
45-
}
35+
pub use cortex_m_0_6::peripheral::dwt::Comparator;
4636

4737
impl DWT {
4838
/// Enables the cycle counter

src/peripheral/mod.rs

Lines changed: 12 additions & 277 deletions
Original file line numberDiff line numberDiff line change
@@ -83,24 +83,16 @@ use core::ops;
8383

8484
use interrupt;
8585

86-
#[cfg(not(armv6m))]
87-
pub mod cbp;
88-
pub mod cpuid;
89-
pub mod dcb;
9086
pub mod dwt;
91-
#[cfg(not(armv6m))]
92-
pub mod fpb;
93-
// NOTE(target_arch) is for documentation purposes
94-
#[cfg(any(has_fpu, target_arch = "x86_64"))]
95-
pub mod fpu;
96-
#[cfg(not(armv6m))]
97-
pub mod itm;
98-
pub mod mpu;
9987
pub mod nvic;
10088
pub mod scb;
101-
pub mod syst;
89+
10290
#[cfg(not(armv6m))]
103-
pub mod tpiu;
91+
pub use cortex_m_0_6::peripheral::{cbp, fpb, itm, tpiu};
92+
// NOTE(target_arch) is for documentation purposes
93+
#[cfg(any(has_fpu, target_arch = "x86_64"))]
94+
pub use cortex_m_0_6::peripheral::fpu;
95+
pub use cortex_m_0_6::peripheral::{cpuid, dcb, mpu, syst};
10496

10597
#[cfg(test)]
10698
mod test;
@@ -147,10 +139,10 @@ pub struct Peripherals {
147139
pub TPIU: TPIU,
148140
}
149141

150-
// NOTE `no_mangle` is used here to prevent linking different minor versions of this crate as that
151-
// would let you `take` the core peripherals more than once (one per minor version)
152-
#[no_mangle]
153-
static mut CORE_PERIPHERALS: bool = false;
142+
// Re-use the CORE_PERIPHERALS static from cortex-m v0.6.0 to allow interoperation
143+
extern "C" {
144+
static mut CORE_PERIPHERALS: bool;
145+
}
154146

155147
impl Peripherals {
156148
/// Returns all the core peripherals *once*
@@ -170,121 +162,11 @@ impl Peripherals {
170162
debug_assert!(!CORE_PERIPHERALS);
171163

172164
CORE_PERIPHERALS = true;
173-
174-
Peripherals {
175-
CBP: CBP {
176-
_marker: PhantomData,
177-
},
178-
CPUID: CPUID {
179-
_marker: PhantomData,
180-
},
181-
DCB: DCB {
182-
_marker: PhantomData,
183-
},
184-
DWT: DWT {
185-
_marker: PhantomData,
186-
},
187-
FPB: FPB {
188-
_marker: PhantomData,
189-
},
190-
FPU: FPU {
191-
_marker: PhantomData,
192-
},
193-
ITM: ITM {
194-
_marker: PhantomData,
195-
},
196-
MPU: MPU {
197-
_marker: PhantomData,
198-
},
199-
NVIC: NVIC {
200-
_marker: PhantomData,
201-
},
202-
SCB: SCB {
203-
_marker: PhantomData,
204-
},
205-
SYST: SYST {
206-
_marker: PhantomData,
207-
},
208-
TPIU: TPIU {
209-
_marker: PhantomData,
210-
},
211-
}
212-
}
213-
}
214-
215-
/// Cache and branch predictor maintenance operations
216-
pub struct CBP {
217-
_marker: PhantomData<*const ()>,
218-
}
219-
220-
unsafe impl Send for CBP {}
221-
222-
#[cfg(not(armv6m))]
223-
impl CBP {
224-
pub(crate) unsafe fn new() -> Self {
225-
CBP {
226-
_marker: PhantomData,
227-
}
228-
}
229-
230-
/// Returns a pointer to the register block
231-
pub fn ptr() -> *const self::cbp::RegisterBlock {
232-
0xE000_EF50 as *const _
165+
core::mem::transmute(())
233166
}
234167
}
235168

236-
#[cfg(not(armv6m))]
237-
impl ops::Deref for CBP {
238-
type Target = self::cbp::RegisterBlock;
239-
240-
fn deref(&self) -> &Self::Target {
241-
unsafe { &*Self::ptr() }
242-
}
243-
}
244-
245-
/// CPUID
246-
pub struct CPUID {
247-
_marker: PhantomData<*const ()>,
248-
}
249-
250-
unsafe impl Send for CPUID {}
251-
252-
impl CPUID {
253-
/// Returns a pointer to the register block
254-
pub fn ptr() -> *const self::cpuid::RegisterBlock {
255-
0xE000_ED00 as *const _
256-
}
257-
}
258-
259-
impl ops::Deref for CPUID {
260-
type Target = self::cpuid::RegisterBlock;
261-
262-
fn deref(&self) -> &Self::Target {
263-
unsafe { &*Self::ptr() }
264-
}
265-
}
266-
267-
/// Debug Control Block
268-
pub struct DCB {
269-
_marker: PhantomData<*const ()>,
270-
}
271-
272-
unsafe impl Send for DCB {}
273-
274-
impl DCB {
275-
/// Returns a pointer to the register block
276-
pub fn ptr() -> *const dcb::RegisterBlock {
277-
0xE000_EDF0 as *const _
278-
}
279-
}
280-
281-
impl ops::Deref for DCB {
282-
type Target = self::dcb::RegisterBlock;
283-
284-
fn deref(&self) -> &Self::Target {
285-
unsafe { &*DCB::ptr() }
286-
}
287-
}
169+
pub use cortex_m_0_6::peripheral::{CBP, CPUID, DCB, FPB, FPU, ITM, MPU, SYST, TPIU};
288170

289171
/// Data Watchpoint and Trace unit
290172
pub struct DWT {
@@ -308,107 +190,6 @@ impl ops::Deref for DWT {
308190
}
309191
}
310192

311-
/// Flash Patch and Breakpoint unit
312-
pub struct FPB {
313-
_marker: PhantomData<*const ()>,
314-
}
315-
316-
unsafe impl Send for FPB {}
317-
318-
#[cfg(not(armv6m))]
319-
impl FPB {
320-
/// Returns a pointer to the register block
321-
pub fn ptr() -> *const fpb::RegisterBlock {
322-
0xE000_2000 as *const _
323-
}
324-
}
325-
326-
#[cfg(not(armv6m))]
327-
impl ops::Deref for FPB {
328-
type Target = self::fpb::RegisterBlock;
329-
330-
fn deref(&self) -> &Self::Target {
331-
unsafe { &*Self::ptr() }
332-
}
333-
}
334-
335-
/// Floating Point Unit
336-
pub struct FPU {
337-
_marker: PhantomData<*const ()>,
338-
}
339-
340-
unsafe impl Send for FPU {}
341-
342-
#[cfg(any(has_fpu, target_arch = "x86_64"))]
343-
impl FPU {
344-
/// Returns a pointer to the register block
345-
pub fn ptr() -> *const fpu::RegisterBlock {
346-
0xE000_EF30 as *const _
347-
}
348-
}
349-
350-
#[cfg(any(has_fpu, target_arch = "x86_64"))]
351-
impl ops::Deref for FPU {
352-
type Target = self::fpu::RegisterBlock;
353-
354-
fn deref(&self) -> &Self::Target {
355-
unsafe { &*Self::ptr() }
356-
}
357-
}
358-
359-
/// Instrumentation Trace Macrocell
360-
pub struct ITM {
361-
_marker: PhantomData<*const ()>,
362-
}
363-
364-
unsafe impl Send for ITM {}
365-
366-
#[cfg(not(armv6m))]
367-
impl ITM {
368-
/// Returns a pointer to the register block
369-
pub fn ptr() -> *mut itm::RegisterBlock {
370-
0xE000_0000 as *mut _
371-
}
372-
}
373-
374-
#[cfg(not(armv6m))]
375-
impl ops::Deref for ITM {
376-
type Target = self::itm::RegisterBlock;
377-
378-
fn deref(&self) -> &Self::Target {
379-
unsafe { &*Self::ptr() }
380-
}
381-
}
382-
383-
#[cfg(not(armv6m))]
384-
impl ops::DerefMut for ITM {
385-
fn deref_mut(&mut self) -> &mut Self::Target {
386-
unsafe { &mut *Self::ptr() }
387-
}
388-
}
389-
390-
/// Memory Protection Unit
391-
pub struct MPU {
392-
_marker: PhantomData<*const ()>,
393-
}
394-
395-
unsafe impl Send for MPU {}
396-
397-
impl MPU {
398-
/// Returns a pointer to the register block
399-
pub fn ptr() -> *const mpu::RegisterBlock {
400-
0xE000_ED90 as *const _
401-
}
402-
}
403-
404-
impl ops::Deref for MPU {
405-
type Target = self::mpu::RegisterBlock;
406-
407-
fn deref(&self) -> &Self::Target {
408-
unsafe { &*Self::ptr() }
409-
}
410-
}
411-
412193
/// Nested Vector Interrupt Controller
413194
pub struct NVIC {
414195
_marker: PhantomData<*const ()>,
@@ -452,49 +233,3 @@ impl ops::Deref for SCB {
452233
unsafe { &*Self::ptr() }
453234
}
454235
}
455-
456-
/// SysTick: System Timer
457-
pub struct SYST {
458-
_marker: PhantomData<*const ()>,
459-
}
460-
461-
unsafe impl Send for SYST {}
462-
463-
impl SYST {
464-
/// Returns a pointer to the register block
465-
pub fn ptr() -> *const syst::RegisterBlock {
466-
0xE000_E010 as *const _
467-
}
468-
}
469-
470-
impl ops::Deref for SYST {
471-
type Target = self::syst::RegisterBlock;
472-
473-
fn deref(&self) -> &Self::Target {
474-
unsafe { &*Self::ptr() }
475-
}
476-
}
477-
478-
/// Trace Port Interface Unit
479-
pub struct TPIU {
480-
_marker: PhantomData<*const ()>,
481-
}
482-
483-
unsafe impl Send for TPIU {}
484-
485-
#[cfg(not(armv6m))]
486-
impl TPIU {
487-
/// Returns a pointer to the register block
488-
pub fn ptr() -> *const tpiu::RegisterBlock {
489-
0xE004_0000 as *const _
490-
}
491-
}
492-
493-
#[cfg(not(armv6m))]
494-
impl ops::Deref for TPIU {
495-
type Target = self::tpiu::RegisterBlock;
496-
497-
fn deref(&self) -> &Self::Target {
498-
unsafe { &*Self::ptr() }
499-
}
500-
}

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