@@ -121,6 +121,7 @@ fn lane_type_and_count<'tcx>(
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layout : TyLayout < ' tcx > ,
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intrinsic : & str ,
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) -> ( TyLayout < ' tcx > , usize ) {
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+ assert ! ( layout. ty. is_simd( ) ) ;
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let lane_count = match layout. fields {
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layout:: FieldPlacement :: Array { stride : _, count } => usize:: try_from ( count) . unwrap ( ) ,
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_ => panic ! ( "Non vector type {:?} passed to or returned from simd_* intrinsic {}" , layout. ty, intrinsic) ,
@@ -805,6 +806,26 @@ pub fn codegen_intrinsic_call<'a, 'tcx: 'a>(
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simd_cmp!( fx, intrinsic, UnsignedGreaterThanOrEqual |SignedGreaterThanOrEqual ( x, y) -> ret) ;
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} ;
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+ // simd_shuffle32<T, U>(x: T, y: T, idx: [u32; 32]) -> U
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+ _ if intrinsic. starts_with( "simd_shuffle" ) , ( c x, c y, c idx) {
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+ let n: usize = intrinsic[ "simd_shuffle" . len( ) ..] . parse( ) . unwrap( ) ;
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+
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+ assert_eq!( x. layout( ) , y. layout( ) ) ;
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+ let layout = x. layout( ) ;
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+
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+ let ( lane_type, lane_count) = lane_type_and_count( fx, layout, intrinsic) ;
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+ let ( ret_lane_type, ret_lane_count) = lane_type_and_count( fx, ret. layout( ) , intrinsic) ;
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+
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+ assert_eq!( lane_type, ret_lane_type) ;
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+ assert_eq!( n, ret_lane_count) ;
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+
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+ let total_len = lane_count * 2 ;
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+
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+ // TODO get shuffle indices
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+ fx. tcx. sess. warn( "simd_shuffle* not yet implemented" ) ;
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+ crate :: trap:: trap_unimplemented( fx, "simd_shuffle* not yet implemented" ) ;
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+ } ;
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+
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simd_add, ( c x, c y) {
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simd_binop!( fx, intrinsic, iadd( x, y) -> ret) ;
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} ;
@@ -832,7 +853,7 @@ pub fn codegen_intrinsic_call<'a, 'tcx: 'a>(
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simd_or, ( c x, c y) {
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simd_binop!( fx, intrinsic, bor( x, y) -> ret) ;
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} ;
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- simd_bxor , ( c x, c y) {
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+ simd_xor , ( c x, c y) {
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simd_binop!( fx, intrinsic, bxor( x, y) -> ret) ;
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} ;
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