Skip to content
This repository was archived by the owner on May 28, 2025. It is now read-only.

Commit ceb173d

Browse files
committed
Move logic out of machine.rs
1 parent a7c832b commit ceb173d

File tree

2 files changed

+17
-22
lines changed

2 files changed

+17
-22
lines changed

src/concurrency/weak_memory.rs

Lines changed: 15 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -135,20 +135,22 @@ impl StoreBufferAlloc {
135135

136136
/// When a non-atomic access happens on a location that has been atomically accessed
137137
/// before without data race, we can determine that the non-atomic access fully happens
138-
/// before all the prior atomic accesses so the location no longer needs to exhibit
138+
/// after all the prior atomic accesses so the location no longer needs to exhibit
139139
/// any weak memory behaviours until further atomic accesses.
140-
pub fn destroy_atomicity<'tcx>(&self, range: AllocRange) {
141-
let mut buffers = self.store_buffers.borrow_mut();
142-
let access_type = buffers.access_type(range);
143-
match access_type {
144-
AccessType::PerfectlyOverlapping(pos) => {
145-
buffers.remove_from_pos(pos);
146-
}
147-
AccessType::ImperfectlyOverlapping(pos_range) => {
148-
buffers.remove_pos_range(pos_range);
149-
}
150-
AccessType::Empty(_) => {
151-
// Do nothing
140+
pub fn memory_accessed<'tcx>(&self, range: AllocRange, global: &GlobalState) {
141+
if !global.ongoing_atomic_access() {
142+
let mut buffers = self.store_buffers.borrow_mut();
143+
let access_type = buffers.access_type(range);
144+
match access_type {
145+
AccessType::PerfectlyOverlapping(pos) => {
146+
buffers.remove_from_pos(pos);
147+
}
148+
AccessType::ImperfectlyOverlapping(pos_range) => {
149+
buffers.remove_pos_range(pos_range);
150+
}
151+
AccessType::Empty(_) => {
152+
// The range had no weak behaivours attached, do nothing
153+
}
152154
}
153155
}
154156
}

src/machine.rs

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -741,12 +741,7 @@ impl<'mir, 'tcx> Machine<'mir, 'tcx> for Evaluator<'mir, 'tcx> {
741741
)?;
742742
}
743743
if let Some(weak_memory) = &alloc_extra.weak_memory {
744-
if !machine.data_race.as_ref().unwrap().ongoing_atomic_access() {
745-
// This is a non-atomic access. And if we are accessing a previously atomically
746-
// accessed location without racing with them, then the location no longer
747-
// exhibits weak-memory behaviors until a fresh atomic access happens.
748-
weak_memory.destroy_atomicity(range);
749-
}
744+
weak_memory.memory_accessed(range, machine.data_race.as_ref().unwrap());
750745
}
751746
Ok(())
752747
}
@@ -772,9 +767,7 @@ impl<'mir, 'tcx> Machine<'mir, 'tcx> for Evaluator<'mir, 'tcx> {
772767
)?;
773768
}
774769
if let Some(weak_memory) = &alloc_extra.weak_memory {
775-
if !machine.data_race.as_ref().unwrap().ongoing_atomic_access() {
776-
weak_memory.destroy_atomicity(range);
777-
}
770+
weak_memory.memory_accessed(range, machine.data_race.as_ref().unwrap());
778771
}
779772
Ok(())
780773
}

0 commit comments

Comments
 (0)