@@ -5,6 +5,7 @@ declare i8 @llvm.fshl.i8(i8, i8, i8)
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declare i16 @llvm.fshl.i16 (i16 , i16 , i16 )
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declare i32 @llvm.fshl.i32 (i32 , i32 , i32 )
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declare i64 @llvm.fshl.i64 (i64 , i64 , i64 )
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+ declare i128 @llvm.fshl.i128 (i128 , i128 , i128 )
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declare <4 x i32 > @llvm.fshl.v4i32 (<4 x i32 >, <4 x i32 >, <4 x i32 >)
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declare i8 @llvm.fshr.i8 (i8 , i8 , i8 )
@@ -42,6 +43,37 @@ define i64 @fshl_i64(i64 %x, i64 %y, i64 %z) {
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ret i64 %f
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}
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+ define i128 @fshl_i128 (i128 %x , i128 %y , i128 %z ) nounwind {
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+ ; CHECK-LABEL: fshl_i128:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: mvn w9, w4
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+ ; CHECK-NEXT: and x12, x9, #0x7f
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+ ; CHECK-NEXT: extr x8, x3, x2, #1
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+ ; CHECK-NEXT: lsr x10, x3, #1
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+ ; CHECK-NEXT: tst x12, #0x40
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+ ; CHECK-NEXT: lsr x12, x0, #1
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+ ; CHECK-NEXT: lsr x8, x8, x9
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+ ; CHECK-NEXT: lsr x12, x12, x9
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+ ; CHECK-NEXT: lsr x9, x10, x9
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+ ; CHECK-NEXT: lsl x10, x10, #1
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+ ; CHECK-NEXT: lsl x10, x10, x4
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+ ; CHECK-NEXT: lsl x11, x1, x4
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+ ; CHECK-NEXT: and x14, x4, #0x7f
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+ ; CHECK-NEXT: orr x8, x10, x8
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+ ; CHECK-NEXT: lsl x13, x0, x4
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+ ; CHECK-NEXT: orr x11, x11, x12
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+ ; CHECK-NEXT: csel x10, xzr, x9, ne
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+ ; CHECK-NEXT: csel x8, x9, x8, ne
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+ ; CHECK-NEXT: tst x14, #0x40
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+ ; CHECK-NEXT: csel x9, x13, x11, ne
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+ ; CHECK-NEXT: csel x11, xzr, x13, ne
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+ ; CHECK-NEXT: orr x1, x9, x10
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+ ; CHECK-NEXT: orr x0, x11, x8
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+ ; CHECK-NEXT: ret
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+ %f = call i128 @llvm.fshl.i128 (i128 %x , i128 %y , i128 %z )
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+ ret i128 %f
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+ }
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+
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; Verify that weird types are minimally supported.
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declare i37 @llvm.fshl.i37 (i37 , i37 , i37 )
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define i37 @fshl_i37 (i37 %x , i37 %y , i37 %z ) {
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