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Cleanup CodeGen/CallingConvLower.cpp
Patch by pi1024e (email unavailable) Differential Revision: https://reviews.llvm.org/D82593
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llvm/lib/CodeGen/CallingConvLower.cpp

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -195,9 +195,7 @@ static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
195195
return true; // Assume -msse-regparm might be in effect.
196196
if (!VT.isInteger())
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return false;
198-
if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall)
199-
return true;
200-
return false;
198+
return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
201199
}
202200

203201
void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
@@ -213,8 +211,8 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
213211

214212
// Allocate something of this value type repeatedly until we get assigned a
215213
// location in memory.
216-
bool HaveRegParm = true;
217-
while (HaveRegParm) {
214+
bool HaveRegParm;
215+
do {
218216
if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
219217
#ifndef NDEBUG
220218
dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
@@ -223,7 +221,7 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
223221
llvm_unreachable(nullptr);
224222
}
225223
HaveRegParm = Locs.back().isRegLoc();
226-
}
224+
} while (HaveRegParm);
227225

228226
// Copy all the registers from the value locations we added.
229227
assert(NumLocs < Locs.size() && "CC assignment failed to add location");
@@ -254,7 +252,7 @@ void CCState::analyzeMustTailForwardedRegisters(
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const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
255253
const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
256254
for (MCPhysReg PReg : RemainingRegs) {
257-
unsigned VReg = MF.addLiveIn(PReg, RC);
255+
Register VReg = MF.addLiveIn(PReg, RC);
258256
Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
259257
}
260258
}

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