Skip to content

Commit 2f2ae08

Browse files
tlivelytlively
committed
[WebAssembly] Remove experimental SIMD instructions
Removes the instruction definitions, intrinsics, and builtins for qfma/qfms, signselect, and prefetch instructions, which were not included in the final WebAssembly SIMD spec. Depends on D98457. Differential Revision: https://reviews.llvm.org/D98466
1 parent 0d8331c commit 2f2ae08

File tree

10 files changed

+0
-690
lines changed

10 files changed

+0
-690
lines changed

‎clang/include/clang/Basic/BuiltinsWebAssembly.def

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -141,11 +141,6 @@ TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_u_i32x4, "V4UiV8Us", "nc", "
141141

142142
TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
143143

144-
TARGET_BUILTIN(__builtin_wasm_signselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", "simd128")
145-
TARGET_BUILTIN(__builtin_wasm_signselect_i16x8, "V8sV8sV8sV8s", "nc", "simd128")
146-
TARGET_BUILTIN(__builtin_wasm_signselect_i32x4, "V4iV4iV4iV4i", "nc", "simd128")
147-
TARGET_BUILTIN(__builtin_wasm_signselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", "simd128")
148-
149144
TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, "V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
150145

151146
TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16Sc", "nc", "simd128")
@@ -188,11 +183,6 @@ TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
188183
TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "simd128")
189184
TARGET_BUILTIN(__builtin_wasm_sqrt_f64x2, "V2dV2d", "nc", "simd128")
190185

191-
TARGET_BUILTIN(__builtin_wasm_qfma_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
192-
TARGET_BUILTIN(__builtin_wasm_qfms_f32x4, "V4fV4fV4fV4f", "nc", "simd128")
193-
TARGET_BUILTIN(__builtin_wasm_qfma_f64x2, "V2dV2dV2dV2d", "nc", "simd128")
194-
TARGET_BUILTIN(__builtin_wasm_qfms_f64x2, "V2dV2dV2dV2d", "nc", "simd128")
195-
196186
TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i32x4_f32x4, "V4iV4f", "nc", "simd128")
197187
TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i32x4_f32x4, "V4iV4f", "nc", "simd128")
198188

@@ -206,9 +196,6 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, "V2LLiV4i", "nc", "simd1
206196
TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128")
207197
TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128")
208198

209-
TARGET_BUILTIN(__builtin_wasm_widen_s_i8x16_i32x4, "V4iV16ScIi", "nc", "simd128")
210-
TARGET_BUILTIN(__builtin_wasm_widen_u_i8x16_i32x4, "V4UiV16UcIi", "nc", "simd128")
211-
212199
TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", "simd128")
213200
TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", "simd128")
214201
TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", "nc", "simd128")
@@ -230,8 +217,5 @@ TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
230217

231218
TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
232219

233-
TARGET_BUILTIN(__builtin_wasm_prefetch_t, "vv*", "n", "simd128")
234-
TARGET_BUILTIN(__builtin_wasm_prefetch_nt, "vv*", "n", "simd128")
235-
236220
#undef BUILTIN
237221
#undef TARGET_BUILTIN

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 0 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -17366,17 +17366,6 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1736617366
CGM.getIntrinsic(Intrinsic::wasm_bitselect, ConvertType(E->getType()));
1736717367
return Builder.CreateCall(Callee, {V1, V2, C});
1736817368
}
17369-
case WebAssembly::BI__builtin_wasm_signselect_i8x16:
17370-
case WebAssembly::BI__builtin_wasm_signselect_i16x8:
17371-
case WebAssembly::BI__builtin_wasm_signselect_i32x4:
17372-
case WebAssembly::BI__builtin_wasm_signselect_i64x2: {
17373-
Value *V1 = EmitScalarExpr(E->getArg(0));
17374-
Value *V2 = EmitScalarExpr(E->getArg(1));
17375-
Value *C = EmitScalarExpr(E->getArg(2));
17376-
Function *Callee =
17377-
CGM.getIntrinsic(Intrinsic::wasm_signselect, ConvertType(E->getType()));
17378-
return Builder.CreateCall(Callee, {V1, V2, C});
17379-
}
1738017369
case WebAssembly::BI__builtin_wasm_dot_s_i32x4_i16x8: {
1738117370
Value *LHS = EmitScalarExpr(E->getArg(0));
1738217371
Value *RHS = EmitScalarExpr(E->getArg(1));
@@ -17444,29 +17433,6 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1744417433
Function *Callee = CGM.getIntrinsic(Intrinsic::sqrt, Vec->getType());
1744517434
return Builder.CreateCall(Callee, {Vec});
1744617435
}
17447-
case WebAssembly::BI__builtin_wasm_qfma_f32x4:
17448-
case WebAssembly::BI__builtin_wasm_qfms_f32x4:
17449-
case WebAssembly::BI__builtin_wasm_qfma_f64x2:
17450-
case WebAssembly::BI__builtin_wasm_qfms_f64x2: {
17451-
Value *A = EmitScalarExpr(E->getArg(0));
17452-
Value *B = EmitScalarExpr(E->getArg(1));
17453-
Value *C = EmitScalarExpr(E->getArg(2));
17454-
unsigned IntNo;
17455-
switch (BuiltinID) {
17456-
case WebAssembly::BI__builtin_wasm_qfma_f32x4:
17457-
case WebAssembly::BI__builtin_wasm_qfma_f64x2:
17458-
IntNo = Intrinsic::wasm_qfma;
17459-
break;
17460-
case WebAssembly::BI__builtin_wasm_qfms_f32x4:
17461-
case WebAssembly::BI__builtin_wasm_qfms_f64x2:
17462-
IntNo = Intrinsic::wasm_qfms;
17463-
break;
17464-
default:
17465-
llvm_unreachable("unexpected builtin ID");
17466-
}
17467-
Function *Callee = CGM.getIntrinsic(IntNo, A->getType());
17468-
return Builder.CreateCall(Callee, {A, B, C});
17469-
}
1747017436
case WebAssembly::BI__builtin_wasm_narrow_s_i8x16_i16x8:
1747117437
case WebAssembly::BI__builtin_wasm_narrow_u_i8x16_i16x8:
1747217438
case WebAssembly::BI__builtin_wasm_narrow_s_i16x8_i32x4:
@@ -17515,26 +17481,6 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1751517481
Function *Callee = CGM.getIntrinsic(IntNo);
1751617482
return Builder.CreateCall(Callee, Vec);
1751717483
}
17518-
case WebAssembly::BI__builtin_wasm_widen_s_i8x16_i32x4:
17519-
case WebAssembly::BI__builtin_wasm_widen_u_i8x16_i32x4: {
17520-
Value *Vec = EmitScalarExpr(E->getArg(0));
17521-
llvm::APSInt SubVecConst =
17522-
*E->getArg(1)->getIntegerConstantExpr(getContext());
17523-
Value *SubVec = llvm::ConstantInt::get(getLLVMContext(), SubVecConst);
17524-
unsigned IntNo;
17525-
switch (BuiltinID) {
17526-
case WebAssembly::BI__builtin_wasm_widen_s_i8x16_i32x4:
17527-
IntNo = Intrinsic::wasm_widen_signed;
17528-
break;
17529-
case WebAssembly::BI__builtin_wasm_widen_u_i8x16_i32x4:
17530-
IntNo = Intrinsic::wasm_widen_unsigned;
17531-
break;
17532-
default:
17533-
llvm_unreachable("unexpected builtin ID");
17534-
}
17535-
Function *Callee = CGM.getIntrinsic(IntNo);
17536-
return Builder.CreateCall(Callee, {Vec, SubVec});
17537-
}
1753817484
case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2:
1753917485
case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: {
1754017486
Value *Vec = EmitScalarExpr(E->getArg(0));
@@ -17649,16 +17595,6 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1764917595
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
1765017596
return Builder.CreateCall(Callee, Ops);
1765117597
}
17652-
case WebAssembly::BI__builtin_wasm_prefetch_t: {
17653-
Value *Ptr = EmitScalarExpr(E->getArg(0));
17654-
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_t);
17655-
return Builder.CreateCall(Callee, Ptr);
17656-
}
17657-
case WebAssembly::BI__builtin_wasm_prefetch_nt: {
17658-
Value *Ptr = EmitScalarExpr(E->getArg(0));
17659-
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_nt);
17660-
return Builder.CreateCall(Callee, Ptr);
17661-
}
1766217598
default:
1766317599
return nullptr;
1766417600
}

‎clang/test/CodeGen/builtins-wasm.c

Lines changed: 0 additions & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -644,34 +644,6 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
644644
// WEBASSEMBLY-NEXT: ret
645645
}
646646

647-
i8x16 signselect_i8x16(i8x16 x, i8x16 y, i8x16 c) {
648-
return __builtin_wasm_signselect_i8x16(x, y, c);
649-
// WEBASSEMBLY: call <16 x i8> @llvm.wasm.signselect.v16i8(
650-
// WEBASSEMBLY-SAME: <16 x i8> %x, <16 x i8> %y, <16 x i8> %c)
651-
// WEBASSEMBLY-NEXT: ret
652-
}
653-
654-
i16x8 signselect_i16x8(i16x8 x, i16x8 y, i16x8 c) {
655-
return __builtin_wasm_signselect_i16x8(x, y, c);
656-
// WEBASSEMBLY: call <8 x i16> @llvm.wasm.signselect.v8i16(
657-
// WEBASSEMBLY-SAME: <8 x i16> %x, <8 x i16> %y, <8 x i16> %c)
658-
// WEBASSEMBLY-NEXT: ret
659-
}
660-
661-
i32x4 signselect_i32x4(i32x4 x, i32x4 y, i32x4 c) {
662-
return __builtin_wasm_signselect_i32x4(x, y, c);
663-
// WEBASSEMBLY: call <4 x i32> @llvm.wasm.signselect.v4i32(
664-
// WEBASSEMBLY-SAME: <4 x i32> %x, <4 x i32> %y, <4 x i32> %c)
665-
// WEBASSEMBLY-NEXT: ret
666-
}
667-
668-
i64x2 signselect_i64x2(i64x2 x, i64x2 y, i64x2 c) {
669-
return __builtin_wasm_signselect_i64x2(x, y, c);
670-
// WEBASSEMBLY: call <2 x i64> @llvm.wasm.signselect.v2i64(
671-
// WEBASSEMBLY-SAME: <2 x i64> %x, <2 x i64> %y, <2 x i64> %c)
672-
// WEBASSEMBLY-NEXT: ret
673-
}
674-
675647
i8x16 popcnt(i8x16 x) {
676648
return __builtin_wasm_popcnt_i8x16(x);
677649
// WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)
@@ -884,34 +856,6 @@ f64x2 sqrt_f64x2(f64x2 x) {
884856
// WEBASSEMBLY: ret
885857
}
886858

887-
f32x4 qfma_f32x4(f32x4 a, f32x4 b, f32x4 c) {
888-
return __builtin_wasm_qfma_f32x4(a, b, c);
889-
// WEBASSEMBLY: call <4 x float> @llvm.wasm.qfma.v4f32(
890-
// WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b, <4 x float> %c)
891-
// WEBASSEMBLY-NEXT: ret
892-
}
893-
894-
f32x4 qfms_f32x4(f32x4 a, f32x4 b, f32x4 c) {
895-
return __builtin_wasm_qfms_f32x4(a, b, c);
896-
// WEBASSEMBLY: call <4 x float> @llvm.wasm.qfms.v4f32(
897-
// WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b, <4 x float> %c)
898-
// WEBASSEMBLY-NEXT: ret
899-
}
900-
901-
f64x2 qfma_f64x2(f64x2 a, f64x2 b, f64x2 c) {
902-
return __builtin_wasm_qfma_f64x2(a, b, c);
903-
// WEBASSEMBLY: call <2 x double> @llvm.wasm.qfma.v2f64(
904-
// WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
905-
// WEBASSEMBLY-NEXT: ret
906-
}
907-
908-
f64x2 qfms_f64x2(f64x2 a, f64x2 b, f64x2 c) {
909-
return __builtin_wasm_qfms_f64x2(a, b, c);
910-
// WEBASSEMBLY: call <2 x double> @llvm.wasm.qfms.v2f64(
911-
// WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b, <2 x double> %c)
912-
// WEBASSEMBLY-NEXT: ret
913-
}
914-
915859
i32x4 trunc_saturate_s_i32x4_f32x4(f32x4 f) {
916860
return __builtin_wasm_trunc_saturate_s_i32x4_f32x4(f);
917861
// WEBASSEMBLY: call <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float> %f)
@@ -976,18 +920,6 @@ u64x2 widen_high_u_i32x4_i64x2(u32x4 x) {
976920
// WEBASSEMBLY: ret
977921
}
978922

979-
i32x4 widen_s_i8x16_i32x4(i8x16 x) {
980-
return __builtin_wasm_widen_s_i8x16_i32x4(x, 3);
981-
// WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.signed(<16 x i8> %x, i32 3)
982-
// WEBASSEMBLY: ret
983-
}
984-
985-
u32x4 widen_u_i8x16_i32x4(u8x16 x) {
986-
return __builtin_wasm_widen_u_i8x16_i32x4(x, 3);
987-
// WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.unsigned(<16 x i8> %x, i32 3)
988-
// WEBASSEMBLY: ret
989-
}
990-
991923
f64x2 convert_low_s_i32x4_f64x2(i32x4 x) {
992924
return __builtin_wasm_convert_low_s_i32x4_f64x2(x);
993925
// WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x)
@@ -1050,13 +982,3 @@ i8x16 shuffle(i8x16 x, i8x16 y) {
1050982
// WEBASSEMBLY-SAME: i32 15
1051983
// WEBASSEMBLY-NEXT: ret
1052984
}
1053-
1054-
void prefetch_t(void *p) {
1055-
return __builtin_wasm_prefetch_t(p);
1056-
// WEBASSEMBLY: call void @llvm.wasm.prefetch.t(i8* %p)
1057-
}
1058-
1059-
void prefetch_nt(void *p) {
1060-
return __builtin_wasm_prefetch_nt(p);
1061-
// WEBASSEMBLY: call void @llvm.wasm.prefetch.nt(i8* %p)
1062-
}

‎llvm/include/llvm/IR/IntrinsicsWebAssembly.td

Lines changed: 0 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -143,14 +143,6 @@ def int_wasm_bitmask :
143143
Intrinsic<[llvm_i32_ty],
144144
[llvm_anyvector_ty],
145145
[IntrNoMem, IntrSpeculatable]>;
146-
def int_wasm_qfma :
147-
Intrinsic<[llvm_anyvector_ty],
148-
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
149-
[IntrNoMem, IntrSpeculatable]>;
150-
def int_wasm_qfms :
151-
Intrinsic<[llvm_anyvector_ty],
152-
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
153-
[IntrNoMem, IntrSpeculatable]>;
154146
def int_wasm_dot :
155147
Intrinsic<[llvm_v4i32_ty],
156148
[llvm_v8i16_ty, llvm_v8i16_ty],
@@ -302,32 +294,13 @@ def int_wasm_extadd_pairwise_unsigned :
302294
[LLVMSubdivide2VectorType<0>],
303295
[IntrNoMem, IntrSpeculatable]>;
304296

305-
def int_wasm_signselect :
306-
Intrinsic<[llvm_anyvector_ty],
307-
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
308-
[IntrNoMem, IntrSpeculatable]>;
309-
310297
// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets
311298
// merged to the proposal.
312299
def int_wasm_eq :
313300
Intrinsic<[llvm_v2i64_ty],
314301
[llvm_v2i64_ty, llvm_v2i64_ty],
315302
[IntrNoMem, IntrSpeculatable]>;
316303

317-
// TODO: Remove this after experiments have been run. Use the target-agnostic
318-
// int_prefetch if this becomes specified at some point.
319-
def int_wasm_prefetch_t :
320-
Intrinsic<[], [llvm_ptr_ty],
321-
[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
322-
ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
323-
"", [SDNPMemOperand]>;
324-
325-
def int_wasm_prefetch_nt :
326-
Intrinsic<[], [llvm_ptr_ty],
327-
[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
328-
ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
329-
"", [SDNPMemOperand]>;
330-
331304
// TODO: Remove these if possible if they are merged to the spec.
332305
def int_wasm_convert_low_signed :
333306
Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty],
@@ -348,14 +321,6 @@ def int_wasm_promote_low :
348321
Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty],
349322
[IntrNoMem, IntrSpeculatable]>;
350323

351-
// TODO: Remove these if possible if they are merged to the spec.
352-
def int_wasm_widen_signed :
353-
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
354-
[IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
355-
def int_wasm_widen_unsigned :
356-
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
357-
[IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
358-
359324
//===----------------------------------------------------------------------===//
360325
// Thread-local storage intrinsics
361326
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,6 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
196196
WASM_LOAD_STORE(LOAD8_SPLAT)
197197
WASM_LOAD_STORE(LOAD_LANE_I8x16)
198198
WASM_LOAD_STORE(STORE_LANE_I8x16)
199-
WASM_LOAD_STORE(PREFETCH_T)
200-
WASM_LOAD_STORE(PREFETCH_NT)
201199
return 0;
202200
WASM_LOAD_STORE(LOAD16_S_I32)
203201
WASM_LOAD_STORE(LOAD16_U_I32)

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -761,16 +761,6 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
761761
Info.align = MemAlign;
762762
return true;
763763
}
764-
case Intrinsic::wasm_prefetch_t:
765-
case Intrinsic::wasm_prefetch_nt: {
766-
Info.opc = ISD::INTRINSIC_VOID;
767-
Info.memVT = MVT::i8;
768-
Info.ptrVal = I.getArgOperand(0);
769-
Info.offset = 0;
770-
Info.align = Align(1);
771-
Info.flags = MachineMemOperand::MOLoad;
772-
return true;
773-
}
774764
default:
775765
return false;
776766
}

0 commit comments

Comments
 (0)