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[AMDGPU][Verifier] Check address space of alloca instruction (llvm#135820)
This PR updates the `Verifier` to enforce that `alloca` instructions on AMDGPU must be in AS5. This prevents hitting a misleading backend error like "unable to select FrameIndex," which makes it look like a backend bug when it's actually an IR-level issue.
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10 files changed

+4085
-3215
lines changed

10 files changed

+4085
-3215
lines changed

‎llvm/lib/IR/Verifier.cpp

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@@ -4395,6 +4395,11 @@ void Verifier::visitAllocaInst(AllocaInst &AI) {
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verifySwiftErrorValue(&AI);
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}
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if (TT.isAMDGPU()) {
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Check(AI.getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS,
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"alloca on amdgpu must be in addrspace(5)", &AI);
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}
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visitInstruction(AI);
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}
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‎llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll

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‎llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll

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@@ -16,8 +16,9 @@ define amdgpu_kernel void @offloading_kernel() {
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}
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define void @call_unknown() {
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%1 = alloca ptr, align 8
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%2 = call i32 %1()
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%alloca = alloca ptr, align 8, addrspace(5)
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%alloca.cast = addrspacecast ptr addrspace(5) %alloca to ptr
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%ret = call i32 %alloca.cast()
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ret void
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}
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‎llvm/test/Transforms/InstCombine/alloca-in-non-alloca-as.ll

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@@ -3,9 +3,6 @@
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; Gracefully handle the alloca that is not in the alloca AS (=5)
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6-
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
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target triple = "amdgcn-amd-amdhsa"
8-
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declare void @use(ptr)
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declare void @use2(ptr, ptr)
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‎llvm/test/Transforms/OpenMP/custom_state_machines.ll

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‎llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll

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‎llvm/test/Transforms/OpenMP/spmdization.ll

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‎llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll

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‎llvm/test/Transforms/OpenMP/spmdization_indirect.ll

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‎llvm/test/Verifier/AMDGPU/alloca.ll

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@@ -0,0 +1,102 @@
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; RUN: not llvm-as %s --disable-output 2>&1 | FileCheck %s
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target triple = "amdgcn-amd-amdhsa"
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, align 4, addrspace(9)
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define void @static_alloca() {
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entry:
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%alloca.0 = alloca i32, align 4
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%alloca.1 = alloca i32, align 4, addrspace(1)
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%alloca.2 = alloca i32, align 4, addrspace(2)
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%alloca.3 = alloca i32, align 4, addrspace(3)
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%alloca.4 = alloca i32, align 4, addrspace(4)
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%alloca.5 = alloca i32, align 4, addrspace(5)
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%alloca.6 = alloca i32, align 4, addrspace(6)
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%alloca.7 = alloca i32, align 4, addrspace(7)
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%alloca.8 = alloca i32, align 4, addrspace(8)
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%alloca.9 = alloca i32, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, i32 %n, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i32(i32 %n) {
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entry:
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%alloca.0 = alloca i32, i32 %n, align 4
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%alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i32 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.0 = alloca i32, i64 %n, align 4
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i64(i64 %n) {
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entry:
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%alloca.0 = alloca i32, i64 %n, align 4
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%alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i64 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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ret void
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}

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