[NFC][ARM] Fix update_llc_test_checks for armv7-apple-ios, autogenerate ifcvt5.ll/ifcvt6.ll

LebedevRI · LebedevRI · commit 4de0c400317e · 2021-06-23T16:31:19.000+03:00
diff --git a/llvm/test/CodeGen/ARM/ifcvt5.ll b/llvm/test/CodeGen/ARM/ifcvt5.ll
@@ -1,10 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
 ; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift     | FileCheck %s -check-prefix=SWIFT
 ; rdar://8402126
 
 @x = external global i32*		; <i32**> [#uses=1]
 
 define void @foo(i32 %a) "frame-pointer"="all" {
+; A8-LABEL: foo:
+; A8:       @ %bb.0: @ %entry
+; A8-NEXT:    movw r1, :lower16:(L_x$non_lazy_ptr-(LPC0_0+8))
+; A8-NEXT:    movt r1, :upper16:(L_x$non_lazy_ptr-(LPC0_0+8))
+; A8-NEXT:  LPC0_0:
+; A8-NEXT:    ldr r1, [pc, r1]
+; A8-NEXT:    ldr r1, [r1]
+; A8-NEXT:    str r0, [r1]
+; A8-NEXT:    bx lr
+;
+; SWIFT-LABEL: foo:
+; SWIFT:       @ %bb.0: @ %entry
+; SWIFT-NEXT:    movw r1, :lower16:(L_x$non_lazy_ptr-(LPC0_0+8))
+; SWIFT-NEXT:    movt r1, :upper16:(L_x$non_lazy_ptr-(LPC0_0+8))
+; SWIFT-NEXT:  LPC0_0:
+; SWIFT-NEXT:    ldr r1, [pc, r1]
+; SWIFT-NEXT:    ldr r1, [r1]
+; SWIFT-NEXT:    str r0, [r1]
+; SWIFT-NEXT:    bx lr
 entry:
 	%tmp = load i32*, i32** @x		; <i32*> [#uses=1]
 	store i32 %a, i32* %tmp
@@ -13,11 +33,30 @@ entry:
 
 define i32 @t1(i32 %a, i32 %b) "frame-pointer"="all" {
 ; A8-LABEL: t1:
-; A8: bxlt lr
-
+; A8:       @ %bb.0: @ %entry
+; A8-NEXT:    cmp r0, #11
+; A8-NEXT:    movlt r0, #1
+; A8-NEXT:    bxlt lr
+; A8-NEXT:  LBB1_1: @ %cond_true
+; A8-NEXT:    push {r7, lr}
+; A8-NEXT:    mov r7, sp
+; A8-NEXT:    mov r0, r1
+; A8-NEXT:    bl _foo
+; A8-NEXT:    mov r0, #0
+; A8-NEXT:    pop {r7, pc}
+;
 ; SWIFT-LABEL: t1:
-; SWIFT: bxlt lr
-; SWIFT: pop {r7, pc}
+; SWIFT:       @ %bb.0: @ %entry
+; SWIFT-NEXT:    cmp r0, #11
+; SWIFT-NEXT:    movlt r0, #1
+; SWIFT-NEXT:    bxlt lr
+; SWIFT-NEXT:  LBB1_1: @ %cond_true
+; SWIFT-NEXT:    push {r7, lr}
+; SWIFT-NEXT:    mov r7, sp
+; SWIFT-NEXT:    mov r0, r1
+; SWIFT-NEXT:    bl _foo
+; SWIFT-NEXT:    mov r0, #0
+; SWIFT-NEXT:    pop {r7, pc}
 entry:
 	%tmp1 = icmp sgt i32 %a, 10		; <i1> [#uses=1]
 	br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
diff --git a/llvm/test/CodeGen/ARM/ifcvt6.ll b/llvm/test/CodeGen/ARM/ifcvt6.ll
@@ -1,9 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s
 
 define void @foo(i32 %X, i32 %Y) {
+; CHECK-LABEL: foo:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    cmp r1, #0
+; CHECK-NEXT:    cmpne r0, #3
+; CHECK-NEXT:    bxhi lr
+; CHECK-NEXT:  LBB0_1: @ %cond_true
+; CHECK-NEXT:    push {lr}
+; CHECK-NEXT:    bl _bar
+; CHECK-NEXT:    pop {lr}
+; CHECK-NEXT:    bx lr
 entry:
-; CHECK: cmpne
-; CHECK: bxhi lr
 	%tmp1 = icmp ult i32 %X, 4		; <i1> [#uses=1]
 	%tmp4 = icmp eq i32 %Y, 0		; <i1> [#uses=1]
 	%tmp7 = or i1 %tmp4, %tmp1		; <i1> [#uses=1]
diff --git a/llvm/utils/UpdateTestChecks/asm.py b/llvm/utils/UpdateTestChecks/asm.py
@@ -142,6 +142,12 @@ class string:
      flags=(re.M | re.S))
 
 ASM_FUNCTION_ARM_IOS_RE = re.compile(
+     r'^_(?P<func>[^:]+):\n'
+     r'(?P<body>.*?)'
+     r'^[ \t]*@[ \t]--[ \t]End[ \t]function',
+     flags=(re.M | re.S))
+
+ASM_FUNCTION_THUMB_IOS_RE = re.compile(
      r'^_(?P<func>[^:]+):[ \t]*\n'
      r'^Lfunc_begin(?P<id>[0-9][1-9]*):\n'
      r'(?P<body>.*?)'
@@ -376,7 +382,7 @@ def get_run_handler(triple):
       'thumb': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
       'thumb-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
       'thumbv5-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
-      'thumbv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE),
+      'thumbv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_THUMB_IOS_RE),
       'm68k': (scrub_asm_m68k, ASM_FUNCTION_M68K_RE),
       'mips': (scrub_asm_mips, ASM_FUNCTION_MIPS_RE),
       'msp430': (scrub_asm_msp430, ASM_FUNCTION_MSP430_RE),
