[TableGen] Remove & Replace old GICombiner Backend

The MatchTable-based GlobalISel Combiner backend is the new default. There are no in-tree users left of the old backend.

- Removed implementation of old MatchDAG-based Combiner, including tests, the backend itself and all supporting code.
- Renamed MatchTable backend to `GlobalISelCombinerEmitter.cpp` + removed "-matchtable" from its CL option.
    - no need to have a verbose name as it's the only backend left now.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D158710

Author: Pierre-vh

llvm/docs/CommandGuide/tblgen.rst

@@ -507,31 +507,19 @@ llvm-tblgen Options
 
 .. option:: -gen-global-isel-combiner
 
-  (Deprecated, pending removal)
-  Generate legacy GlobalISel combiner.
-
-.. option:: -gen-global-isel-combiner-matchtable
-
-  Generate MatchTable-based GlobalISel combiner.
+  Generate GlobalISel combiner.
 
 .. option:: -combiners=list
 
-  Make -gen-global-isel-combiner and -gen-global-isel-combiner-matchtable
-  emit the specified combiners.
-
-.. option:: -gicombiner-show-expansions
-
-  Make -gen-global-isel-combiner use C++ comments to indicate occurrences
-  of code expansion.
+  Make -gen-global-isel-combiner emit the specified combiners.
 
-.. option:: -gicombiner-stop-after-build
+.. option:: -gicombiner-debug-cxxpreds
 
-  Make -gen-global-isel-combiner stop processing after building the match tree.
+  Add debug comments to all C++ predicates emitted by -gen-global-isel-combiner
 
 .. option:: -gicombiner-stop-after-parse
 
-  Make -gen-global-isel-combiner and -gen-global-isel-combiner-matchtable stop
-  processing after parsing rules and dump state.
+  Make -gen-global-isel-combiner stop processing after parsing rules and dump state.
 
 .. option:: -gen-instr-info
 

llvm/lib/Target/AArch64/CMakeLists.txt

@@ -10,13 +10,13 @@ tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
-tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="AArch64O0PreLegalizerCombiner")
-tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="AArch64PreLegalizerCombiner")
-tablegen(LLVM AArch64GenPostLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AArch64GenPostLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="AArch64PostLegalizerCombiner")
-tablegen(LLVM AArch64GenPostLegalizeGILowering.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AArch64GenPostLegalizeGILowering.inc -gen-global-isel-combiner
               -combiners="AArch64PostLegalizerLowering")
 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)

llvm/lib/Target/AMDGPU/CMakeLists.txt

@@ -17,11 +17,11 @@ tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
 
 set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
 tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
-tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="AMDGPUPreLegalizerCombiner")
-tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="AMDGPUPostLegalizerCombiner")
-tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
               -combiners="AMDGPURegBankCombiner")
 
 set(LLVM_TARGET_DEFINITIONS R600.td)

llvm/lib/Target/Mips/CMakeLists.txt

@@ -9,7 +9,7 @@ tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
 tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
 tablegen(LLVM MipsGenGlobalISel.inc -gen-global-isel)
-tablegen(LLVM MipsGenPostLegalizeGICombiner.inc -gen-global-isel-combiner-matchtable
+tablegen(LLVM MipsGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
               -combiners="MipsPostLegalizerCombiner")
 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)