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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -O3 -S < %s | FileCheck %s |
| 3 | + |
| 4 | +target datalayout = "n8:16:32:64" |
| 5 | + |
| 6 | +define i32 @main(i32 %a) { |
| 7 | +; CHECK-LABEL: @main( |
| 8 | +; CHECK-NEXT: if.end: |
| 9 | +; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[A:%.*]] to i8 |
| 10 | +; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[TMP0]], 1 |
| 11 | +; CHECK-NEXT: [[CONV:%.*]] = and i8 [[TMP1]], 8 |
| 12 | +; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i8 [[CONV]], 0 |
| 13 | +; CHECK-NEXT: [[SHL_I:%.*]] = select i1 [[CMP_I_NOT]], i8 7, i8 0 |
| 14 | +; CHECK-NEXT: [[COND_I:%.*]] = shl i8 [[CONV]], [[SHL_I]] |
| 15 | +; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[COND_I]] to i32 |
| 16 | +; CHECK-NEXT: [[SEXT:%.*]] = mul i32 [[CONV1]], 1355350016 |
| 17 | +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[SEXT]], 65536 |
| 18 | +; CHECK-NEXT: tail call void @llvm.assume(i1 [[TOBOOL]]) |
| 19 | +; CHECK-NEXT: ret i32 0 |
| 20 | +; |
| 21 | + %inc = add nsw i32 %a, 1 |
| 22 | + %and = and i32 %inc, 8 |
| 23 | + %conv = trunc i32 %and to i8 |
| 24 | + %call = call fastcc i8 @a(i8 %conv, i32 7) |
| 25 | + %conv1 = sext i8 %call to i64 |
| 26 | + %call2 = call fastcc i64 @d(i64 %conv1) |
| 27 | + %mul = mul nsw i64 %call2, 20681 |
| 28 | + %conv3 = trunc i64 %mul to i16 |
| 29 | + %conv4 = sext i16 %conv3 to i32 |
| 30 | + %xor = xor i32 %conv4, 1 |
| 31 | + %tobool = icmp ne i32 %xor, 0 |
| 32 | + br i1 %tobool, label %if.end, label %if.then |
| 33 | + |
| 34 | +if.then: |
| 35 | + call void undef() |
| 36 | + br label %if.end |
| 37 | + |
| 38 | +if.end: |
| 39 | + %call5 = call fastcc i8 @a(i8 0, i32 0) |
| 40 | + ret i32 0 |
| 41 | +} |
| 42 | + |
| 43 | +define internal fastcc i8 @a(i8 %h, i32 %i) { |
| 44 | + %t0 = zext i8 %h to i32 |
| 45 | + %cmp = icmp sgt i32 %t0, %i |
| 46 | + %shl = shl i32 %t0, %i |
| 47 | + %cond = select i1 %cmp, i32 %t0, i32 %shl |
| 48 | + %conv4 = trunc i32 %cond to i8 |
| 49 | + ret i8 %conv4 |
| 50 | +} |
| 51 | + |
| 52 | +define internal fastcc i64 @d(i64 %h) { |
| 53 | + ret i64 %h |
| 54 | +} |
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