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[Polly] Hide IslScheduleOptimizer implementation from header. NFC.
These are implementation details of the IslScheduleOptimizer pass implementation and not use anywhere else. Hence, we can move them to the cpp file and into an anonymous namespace. Only getPartialTilePrefixes is, aside from the pass itself, used externally (by the ScheduleOptimizerTest) and moved into the polly namespace.
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‎polly/include/polly/ScheduleOptimizer.h

Lines changed: 6 additions & 320 deletions
Original file line numberDiff line numberDiff line change
@@ -10,66 +10,13 @@
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#define POLLY_SCHEDULEOPTIMIZER_H
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#include "polly/ScopPass.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "isl/isl-noexceptions.h"
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namespace llvm {
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class Pass;
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class PassRegistry;
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class TargetTransformInfo;
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} // namespace llvm
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struct isl_schedule_node;
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/// Parameters of the micro kernel.
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///
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/// Parameters, which determine sizes of rank-1 (i.e., outer product) update
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/// used in the optimized matrix multiplication.
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struct MicroKernelParamsTy {
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int Mr;
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int Nr;
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};
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/// Parameters of the macro kernel.
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///
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/// Parameters, which determine sizes of blocks of partitioned matrices
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/// used in the optimized matrix multiplication.
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struct MacroKernelParamsTy {
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int Mc;
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int Nc;
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int Kc;
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};
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namespace polly {
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struct Dependences;
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class MemoryAccess;
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class Scop;
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/// Additional parameters of the schedule optimizer.
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///
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/// Target Transform Info and the SCoP dependencies used by the schedule
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/// optimizer.
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struct OptimizerAdditionalInfoTy {
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const llvm::TargetTransformInfo *TTI;
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const Dependences *D;
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};
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/// Parameters of the matrix multiplication operands.
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///
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/// Parameters, which describe access relations that represent operands of the
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/// matrix multiplication.
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struct MatMulInfoTy {
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MemoryAccess *A = nullptr;
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MemoryAccess *B = nullptr;
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MemoryAccess *ReadFromC = nullptr;
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MemoryAccess *WriteToC = nullptr;
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int i = -1;
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int j = -1;
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int k = -1;
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};
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extern bool DisablePollyTiling;
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llvm::Pass *createIslScheduleOptimizerWrapperPass();
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struct IslScheduleOptimizerPass
@@ -91,273 +38,6 @@ struct IslScheduleOptimizerPrinterPass
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llvm::raw_ostream &OS;
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};
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} // namespace polly
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namespace llvm {
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void initializeIslScheduleOptimizerWrapperPassPass(llvm::PassRegistry &);
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}
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class ScheduleTreeOptimizer {
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public:
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/// Apply schedule tree transformations.
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///
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/// This function takes an (possibly already optimized) schedule tree and
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/// applies a set of additional optimizations on the schedule tree. The
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/// transformations applied include:
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///
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/// - Tiling
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/// - Prevectorization
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///
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/// @param Schedule The schedule object the transformations will be applied
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/// to.
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/// @param OAI Target Transform Info and the SCoP dependencies.
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/// @returns The transformed schedule.
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static isl::schedule
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optimizeSchedule(isl::schedule Schedule,
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const polly::OptimizerAdditionalInfoTy *OAI = nullptr);
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/// Apply schedule tree transformations.
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///
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/// This function takes a node in an (possibly already optimized) schedule
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/// tree and applies a set of additional optimizations on this schedule tree
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/// node and its descendants. The transformations applied include:
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///
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/// - Tiling
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/// - Prevectorization
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///
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/// @param Node The schedule object post-transformations will be applied to.
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/// @param OAI Target Transform Info and the SCoP dependencies.
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/// @returns The transformed schedule.
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static isl::schedule_node
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optimizeScheduleNode(isl::schedule_node Node,
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const polly::OptimizerAdditionalInfoTy *OAI = nullptr);
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/// Decide if the @p NewSchedule is profitable for @p S.
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///
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/// @param S The SCoP we optimize.
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/// @param NewSchedule The new schedule we computed.
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///
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/// @return True, if we believe @p NewSchedule is an improvement for @p S.
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static bool isProfitableSchedule(polly::Scop &S, isl::schedule NewSchedule);
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/// Isolate a set of partial tile prefixes.
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///
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/// This set should ensure that it contains only partial tile prefixes that
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/// have exactly VectorWidth iterations.
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///
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/// @param Node A schedule node band, which is a parent of a band node,
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/// that contains a vector loop.
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/// @return Modified isl_schedule_node.
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static isl::schedule_node isolateFullPartialTiles(isl::schedule_node Node,
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int VectorWidth);
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private:
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/// Tile a schedule node.
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///
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/// @param Node The node to tile.
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/// @param Identifier An name that identifies this kind of tiling and
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/// that is used to mark the tiled loops in the
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/// generated AST.
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/// @param TileSizes A vector of tile sizes that should be used for
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/// tiling.
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/// @param DefaultTileSize A default tile size that is used for dimensions
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/// that are not covered by the TileSizes vector.
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static isl::schedule_node tileNode(isl::schedule_node Node,
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const char *Identifier,
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llvm::ArrayRef<int> TileSizes,
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int DefaultTileSize);
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/// Tile a schedule node and unroll point loops.
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///
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/// @param Node The node to register tile.
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/// @param TileSizes A vector of tile sizes that should be used for
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/// tiling.
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/// @param DefaultTileSize A default tile size that is used for dimensions
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static isl::schedule_node applyRegisterTiling(isl::schedule_node Node,
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llvm::ArrayRef<int> TileSizes,
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int DefaultTileSize);
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/// Apply the BLIS matmul optimization pattern.
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///
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/// Make the loops containing the matrix multiplication be the innermost
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/// loops and apply the BLIS matmul optimization pattern. BLIS implements
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/// gemm as three nested loops around a macro-kernel, plus two packing
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/// routines. The macro-kernel is implemented in terms of two additional
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/// loops around a micro-kernel. The micro-kernel is a loop around a rank-1
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/// (i.e., outer product) update.
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///
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/// For a detailed description please see [1].
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///
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/// The order of the loops defines the data reused in the BLIS implementation
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/// of gemm ([1]). In particular, elements of the matrix B, the second
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/// operand of matrix multiplication, are reused between iterations of the
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/// innermost loop. To keep the reused data in cache, only elements of matrix
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/// A, the first operand of matrix multiplication, should be evicted during
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/// an iteration of the innermost loop. To provide such a cache replacement
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/// policy, elements of the matrix A can, in particular, be loaded first and,
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/// consequently, be least-recently-used.
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///
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/// In our case matrices are stored in row-major order instead of
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/// column-major order used in the BLIS implementation ([1]). It affects only
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/// on the form of the BLIS micro kernel and the computation of its
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/// parameters. In particular, reused elements of the matrix B are
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/// successively multiplied by specific elements of the matrix A.
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///
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/// Refs.:
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/// [1] - Analytical Modeling is Enough for High Performance BLIS
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/// Tze Meng Low, Francisco D Igual, Tyler M Smith, Enrique S Quintana-Orti
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/// Technical Report, 2014
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/// http://www.cs.utexas.edu/users/flame/pubs/TOMS-BLIS-Analytical.pdf
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///
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/// @see ScheduleTreeOptimizer::createMicroKernel
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/// @see ScheduleTreeOptimizer::createMacroKernel
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/// @see getMicroKernelParams
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/// @see getMacroKernelParams
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///
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/// TODO: Implement the packing transformation.
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///
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/// @param Node The node that contains a band to be optimized. The node
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/// is required to successfully pass
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/// ScheduleTreeOptimizer::isMatrMultPattern.
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/// @param TTI Target Transform Info.
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/// @param MMI Parameters of the matrix multiplication operands.
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/// @returns The transformed schedule.
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static isl::schedule_node
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optimizeMatMulPattern(isl::schedule_node Node,
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const llvm::TargetTransformInfo *TTI,
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polly::MatMulInfoTy &MMI);
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/// Check if this node is a band node we want to tile.
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///
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/// We look for innermost band nodes where individual dimensions are marked as
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/// permutable.
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///
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/// @param Node The node to check.
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static bool isTileableBandNode(isl::schedule_node Node);
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/// Pre-vectorizes one scheduling dimension of a schedule band.
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///
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/// prevectSchedBand splits out the dimension DimToVectorize, tiles it and
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/// sinks the resulting point loop.
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///
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/// Example (DimToVectorize=0, VectorWidth=4):
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///
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/// | Before transformation:
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/// |
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/// | A[i,j] -> [i,j]
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/// |
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/// | for (i = 0; i < 128; i++)
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/// | for (j = 0; j < 128; j++)
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/// | A(i,j);
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///
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/// | After transformation:
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/// |
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/// | for (it = 0; it < 32; it+=1)
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/// | for (j = 0; j < 128; j++)
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/// | for (ip = 0; ip <= 3; ip++)
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/// | A(4 * it + ip,j);
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///
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/// The goal of this transformation is to create a trivially vectorizable
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/// loop. This means a parallel loop at the innermost level that has a
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/// constant number of iterations corresponding to the target vector width.
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///
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/// This transformation creates a loop at the innermost level. The loop has
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/// a constant number of iterations, if the number of loop iterations at
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/// DimToVectorize can be divided by VectorWidth. The default VectorWidth is
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/// currently constant and not yet target specific. This function does not
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/// reason about parallelism.
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static isl::schedule_node prevectSchedBand(isl::schedule_node Node,
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unsigned DimToVectorize,
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int VectorWidth);
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/// Apply additional optimizations on the bands in the schedule tree.
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///
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/// We are looking for an innermost band node and apply the following
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/// transformations:
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///
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/// - Tile the band
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/// - if the band is tileable
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/// - if the band has more than one loop dimension
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///
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/// - Prevectorize the schedule of the band (or the point loop in case of
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/// tiling).
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/// - if vectorization is enabled
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///
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/// @param Node The schedule node to (possibly) optimize.
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/// @param User A pointer to forward some use information
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/// (currently unused).
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static isl_schedule_node *optimizeBand(isl_schedule_node *Node, void *User);
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/// Apply additional optimizations on the bands in the schedule tree.
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///
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/// We apply the following
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/// transformations:
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///
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/// - Tile the band
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/// - Prevectorize the schedule of the band (or the point loop in case of
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/// tiling).
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/// - if vectorization is enabled
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///
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/// @param Node The schedule node to (possibly) optimize.
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/// @param User A pointer to forward some use information
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/// (currently unused).
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static isl::schedule_node standardBandOpts(isl::schedule_node Node,
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void *User);
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/// Check if this node contains a partial schedule that could
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/// probably be optimized with analytical modeling.
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///
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/// isMatrMultPattern tries to determine whether the following conditions
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/// are true:
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/// 1. the partial schedule contains only one statement.
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/// 2. there are exactly three input dimensions.
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/// 3. all memory accesses of the statement will have stride 0 or 1, if we
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/// interchange loops (switch the variable used in the inner loop to
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/// the outer loop).
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/// 4. all memory accesses of the statement except from the last one, are
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/// read memory access and the last one is write memory access.
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/// 5. all subscripts of the last memory access of the statement don't
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/// contain the variable used in the inner loop.
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/// If this is the case, we could try to use an approach that is similar to
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/// the one used to get close-to-peak performance of matrix multiplications.
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///
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/// @param Node The node to check.
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/// @param D The SCoP dependencies.
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/// @param MMI Parameters of the matrix multiplication operands.
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static bool isMatrMultPattern(isl::schedule_node Node,
328-
const polly::Dependences *D,
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polly::MatMulInfoTy &MMI);
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/// Create the BLIS macro-kernel.
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///
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/// We create the BLIS macro-kernel by applying a combination of tiling
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/// of dimensions of the band node and interchanging of two innermost
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/// modified dimensions. The values of of MacroKernelParams's fields are used
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/// as tile sizes.
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///
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/// @param Node The schedule node to be modified.
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/// @param MacroKernelParams Parameters of the macro kernel
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/// to be used as tile sizes.
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static isl::schedule_node
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createMacroKernel(isl::schedule_node Node,
343-
MacroKernelParamsTy MacroKernelParams);
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/// Create the BLIS macro-kernel.
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///
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/// We create the BLIS macro-kernel by applying a combination of tiling
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/// of dimensions of the band node and interchanging of two innermost
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/// modified dimensions. The values passed in MicroKernelParam are used
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/// as tile sizes.
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///
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/// @param Node The schedule node to be modified.
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/// @param MicroKernelParams Parameters of the micro kernel
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/// to be used as tile sizes.
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/// @see MicroKernelParamsTy
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static isl::schedule_node
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createMicroKernel(isl::schedule_node Node,
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MicroKernelParamsTy MicroKernelParams);
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};
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36141
/// Build the desired set of partial tile prefixes.
36242
///
36343
/// We build a set of partial tile prefixes, which are prefixes of the vector
@@ -377,4 +57,10 @@ class ScheduleTreeOptimizer {
37757
/// @param ScheduleRange A range of a map, which describes a prefix schedule
37858
/// relation.
37959
isl::set getPartialTilePrefixes(isl::set ScheduleRange, int VectorWidth);
60+
} // namespace polly
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namespace llvm {
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void initializeIslScheduleOptimizerWrapperPassPass(llvm::PassRegistry &);
64+
}
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#endif // POLLY_SCHEDULEOPTIMIZER_H

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