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1 parent 3c90738 commit 859e66fCopy full SHA for 859e66f
llvm/lib/Target/Sparc/SparcInstrFormats.td
@@ -224,7 +224,7 @@ class F3_Si<bits<2> opVal, bits<6> op3val, bit xVal, dag outs, dag ins,
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// Define rr and ri shift instructions with patterns.
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multiclass F3_S<string OpcStr, bits<6> Op3Val, bit XVal, SDNode OpNode,
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- ValueType VT, ValueType SIT, RegisterClass RC,
+ ValueType VT, Operand SIT, RegisterClass RC,
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InstrItinClass itin = IIC_iu_instr> {
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def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs1, IntRegs:$rs2),
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!strconcat(OpcStr, " $rs1, $rs2, $rd"),
@@ -237,7 +237,7 @@ multiclass F3_S<string OpcStr, bits<6> Op3Val, bit XVal, SDNode OpNode,
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}
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class F4<bits<6> op3, dag outs, dag ins, string asmstr, list<dag> pattern,
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- InstrItinClass itin = NoItinerary>
+ InstrItinClass itin = NoItinerary>
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: InstSP<outs, ins, asmstr, pattern, itin> {
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bits<5> rd;
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