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[RISCV][NFC] Move tests of inline asm memory constraints to separate file
We will need to check the output of medium code model. Reviewed By: wangpc Differential Revision: https://reviews.llvm.org/D157965 (cherry picked from commit a3b11ce)
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs -no-integrated-as < %s \
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; RUN: | FileCheck -check-prefixes=RV32I %s
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs -no-integrated-as < %s \
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; RUN: | FileCheck -check-prefixes=RV64I %s
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; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs -no-integrated-as < %s \
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; RUN: | FileCheck -check-prefixes=RV32I-MEDIUM %s
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; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs -no-integrated-as < %s \
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; RUN: | FileCheck -check-prefixes=RV64I-MEDIUM %s
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define void @constraint_m_1(ptr %a) nounwind {
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; RV32I-LABEL: constraint_m_1:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_m_1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_m_1:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_m_1:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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call void asm sideeffect "", "=*m"(ptr elementtype(i32) %a)
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ret void
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}
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define i32 @constraint_m_2(ptr %a) nounwind {
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; RV32I-LABEL: constraint_m_2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lw a0, 0(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_m_2:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lw a0, 0(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_m_2:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_m_2:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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%1 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %a)
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ret i32 %1
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}
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define i32 @constraint_m_with_offset(ptr %a) nounwind {
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; RV32I-LABEL: constraint_m_with_offset:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lw a0, 4(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_m_with_offset:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lw a0, 4(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_m_with_offset:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lw a0, 4(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_m_with_offset:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lw a0, 4(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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%1 = getelementptr i32, ptr %a, i32 1
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%2 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %1)
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ret i32 %2
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}
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define void @constraint_o_1(ptr %a) nounwind {
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; RV32I-LABEL: constraint_o_1:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_o_1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_o_1:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_o_1:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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call void asm sideeffect "", "=*o"(ptr elementtype(i32) %a)
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ret void
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}
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define i32 @constraint_o_2(ptr %a) nounwind {
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; RV32I-LABEL: constraint_o_2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lw a0, 0(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_o_2:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lw a0, 0(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_o_2:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_o_2:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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%1 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %a)
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ret i32 %1
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}
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define i32 @constraint_o_with_offset(ptr %a) nounwind {
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; RV32I-LABEL: constraint_o_with_offset:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lw a0, 4(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_o_with_offset:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lw a0, 4(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_o_with_offset:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lw a0, 4(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_o_with_offset:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lw a0, 4(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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%1 = getelementptr i32, ptr %a, i32 1
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%2 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %1)
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ret i32 %2
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}
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define void @constraint_A(ptr %a) nounwind {
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; RV32I-LABEL: constraint_A:
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; RV32I: # %bb.0:
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; RV32I-NEXT: #APP
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; RV32I-NEXT: sb s0, 0(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lb s1, 0(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_A:
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; RV64I: # %bb.0:
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; RV64I-NEXT: #APP
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; RV64I-NEXT: sb s0, 0(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lb s1, 0(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_A:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: sb s0, 0(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lb s1, 0(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_A:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: sb s0, 0(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lb s1, 0(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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tail call void asm sideeffect "sb s0, $0", "*A"(ptr elementtype(i8) %a)
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tail call void asm sideeffect "lb s1, $0", "*A"(ptr elementtype(i8) %a)
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ret void
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}
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define i32 @constraint_A_with_offset(ptr %a) nounwind {
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; RV32I-LABEL: constraint_A_with_offset:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi a0, a0, 4
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; RV32I-NEXT: #APP
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; RV32I-NEXT: lw a0, 0(a0)
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; RV32I-NEXT: #NO_APP
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: constraint_A_with_offset:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi a0, a0, 4
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; RV64I-NEXT: #APP
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; RV64I-NEXT: lw a0, 0(a0)
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; RV64I-NEXT: #NO_APP
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; RV64I-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: constraint_A_with_offset:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: addi a0, a0, 4
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; RV32I-MEDIUM-NEXT: #APP
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; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV32I-MEDIUM-NEXT: #NO_APP
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; RV32I-MEDIUM-NEXT: ret
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;
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; RV64I-MEDIUM-LABEL: constraint_A_with_offset:
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; RV64I-MEDIUM: # %bb.0:
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; RV64I-MEDIUM-NEXT: addi a0, a0, 4
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; RV64I-MEDIUM-NEXT: #APP
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; RV64I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV64I-MEDIUM-NEXT: #NO_APP
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; RV64I-MEDIUM-NEXT: ret
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%1 = getelementptr i32, ptr %a, i32 1
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%2 = tail call i32 asm "lw $0, $1", "=r,*A"(ptr elementtype(i32) %1)
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ret i32 %2
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}

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