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[AArch64] Fix the upper limit for folded address offsets for COFF
In COFF, the immediates in IMAGE_REL_ARM64_PAGEBASE_REL21 relocations are limited to 21 bit signed, i.e. the offset has to be less than (1 << 20). The previous limit did intend to cover for this case, but had missed that the 21 bit field was signed. This fixes issue llvm#54753. Differential Revision: https://reviews.llvm.org/D123160
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3 files changed

+16
-14
lines changed

3 files changed

+16
-14
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -17929,13 +17929,14 @@ static SDValue performGlobalAddressCombine(SDNode *N, SelectionDAG &DAG,
1792917929

1793017930
// Check whether folding this offset is legal. It must not go out of bounds of
1793117931
// the referenced object to avoid violating the code model, and must be
17932-
// smaller than 2^21 because this is the largest offset expressible in all
17933-
// object formats.
17932+
// smaller than 2^20 because this is the largest offset expressible in all
17933+
// object formats. (The IMAGE_REL_ARM64_PAGEBASE_REL21 relocation in COFF
17934+
// stores an immediate signed 21 bit offset.)
1793417935
//
1793517936
// This check also prevents us from folding negative offsets, which will end
1793617937
// up being treated in the same way as large positive ones. They could also
1793717938
// cause code model violations, and aren't really common enough to matter.
17938-
if (Offset >= (1 << 21))
17939+
if (Offset >= (1 << 20))
1793917940
return SDValue();
1794017941

1794117942
const GlobalValue *GV = GN->getGlobal();

llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -163,13 +163,14 @@ static bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI,
163163

164164
// Check whether folding this offset is legal. It must not go out of bounds of
165165
// the referenced object to avoid violating the code model, and must be
166-
// smaller than 2^21 because this is the largest offset expressible in all
167-
// object formats.
166+
// smaller than 2^20 because this is the largest offset expressible in all
167+
// object formats. (The IMAGE_REL_ARM64_PAGEBASE_REL21 relocation in COFF
168+
// stores an immediate signed 21 bit offset.)
168169
//
169170
// This check also prevents us from folding negative offsets, which will end
170171
// up being treated in the same way as large positive ones. They could also
171172
// cause code model violations, and aren't really common enough to matter.
172-
if (NewOffset >= (1 << 21))
173+
if (NewOffset >= (1 << 20))
173174
return false;
174175

175176
Type *T = GV->getValueType();

llvm/test/CodeGen/AArch64/fold-global-offsets.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -84,36 +84,36 @@ define [2 x i64] @f4() {
8484
define i64 @f5() {
8585
; CHECK-LABEL: f5:
8686
; CHECK: // %bb.0:
87-
; CHECK-NEXT: adrp x8, x2+2097144
88-
; CHECK-NEXT: ldr x0, [x8, :lo12:x2+2097144]
87+
; CHECK-NEXT: adrp x8, x2+1048568
88+
; CHECK-NEXT: ldr x0, [x8, :lo12:x2+1048568]
8989
; CHECK-NEXT: ret
9090
;
9191
; GISEL-LABEL: f5:
9292
; GISEL: // %bb.0:
93-
; GISEL-NEXT: adrp x8, x2+2097144
94-
; GISEL-NEXT: ldr x0, [x8, :lo12:x2+2097144]
93+
; GISEL-NEXT: adrp x8, x2+1048568
94+
; GISEL-NEXT: ldr x0, [x8, :lo12:x2+1048568]
9595
; GISEL-NEXT: ret
96-
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 262143)
96+
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 131071)
9797
ret i64 %l
9898
}
9999

100100
define i64 @f6() {
101101
; CHECK-LABEL: f6:
102102
; CHECK: // %bb.0:
103-
; CHECK-NEXT: mov w8, #2097152
103+
; CHECK-NEXT: mov w8, #1048576
104104
; CHECK-NEXT: adrp x9, x2
105105
; CHECK-NEXT: add x9, x9, :lo12:x2
106106
; CHECK-NEXT: ldr x0, [x9, x8]
107107
; CHECK-NEXT: ret
108108
;
109109
; GISEL-LABEL: f6:
110110
; GISEL: // %bb.0:
111-
; GISEL-NEXT: mov w8, #2097152
111+
; GISEL-NEXT: mov w8, #1048576
112112
; GISEL-NEXT: adrp x9, x2
113113
; GISEL-NEXT: add x9, x9, :lo12:x2
114114
; GISEL-NEXT: ldr x0, [x9, x8]
115115
; GISEL-NEXT: ret
116-
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 262144)
116+
%l = load i64, i64* getelementptr ([16777216 x i64], [16777216 x i64]* @x2, i64 0, i64 131072)
117117
ret i64 %l
118118
}
119119

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