[AMDGPU] Add AGPRs to getRegClassForSizeOnBank

kerbowa · kerbowa · commit 9f0b736126cb · 2020-05-12T10:14:00.000-07:00
Differential Revision: https://reviews.llvm.org/D79761
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -1720,6 +1720,8 @@ SIRegisterInfo::getRegClassForSizeOnBank(unsigned Size,
                     : &AMDGPU::SReg_64_XEXECRegClass;
   case AMDGPU::SGPRRegBankID:
     return getSGPRClassForBitWidth(std::max(32u, Size));
+  case AMDGPU::AGPRRegBankID:
+    return getAGPRClassForBitWidth(std::max(32u, Size));
   default:
     llvm_unreachable("unknown register bank");
   }

Original file line number	Diff line number	Diff line change
`@@ -1720,6 +1720,8 @@ SIRegisterInfo::getRegClassForSizeOnBank(unsigned Size,`
`1720`	`1720`	`: &AMDGPU::SReg_64_XEXECRegClass;`
`1721`	`1721`	`case AMDGPU::SGPRRegBankID:`
`1722`	`1722`	`return getSGPRClassForBitWidth(std::max(32u, Size));`
	`1723`	`+ case AMDGPU::AGPRRegBankID:`
	`1724`	`+ return getAGPRClassForBitWidth(std::max(32u, Size));`
`1723`	`1725`	`default:`
`1724`	`1726`	`llvm_unreachable("unknown register bank");`
`1725`	`1727`	`}`