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alexey-bataevalexey-bataev
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[SLP][NFC]Add tests for SLP vectorizer for crashes, found in new
reordering algorithm.
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‎llvm/test/Transforms/SLPVectorizer/AArch64/gather-load-min-required-vf-2.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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define void @foo() local_unnamed_addr {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load volatile double, double* poison, align 8
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; CHECK-NEXT: [[TMP1:%.*]] = load volatile double, double* poison, align 8
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; CHECK-NEXT: [[TMP2:%.*]] = load volatile double, double* poison, align 8
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; CHECK-NEXT: [[TMP3:%.*]] = load volatile double, double* poison, align 8
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[D30_0734:%.*]] = phi double [ undef, [[FOR_BODY]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[D01_0733:%.*]] = phi double [ undef, [[FOR_BODY]] ], [ [[TMP1]], [[ENTRY]] ]
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; CHECK-NEXT: [[D11_0732:%.*]] = phi double [ undef, [[FOR_BODY]] ], [ [[TMP2]], [[ENTRY]] ]
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; CHECK-NEXT: [[D21_0731:%.*]] = phi double [ undef, [[FOR_BODY]] ], [ [[TMP3]], [[ENTRY]] ]
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; CHECK-NEXT: br label [[FOR_BODY]]
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;
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entry:
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%0 = load volatile double, double* poison, align 8
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%1 = load volatile double, double* poison, align 8
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%2 = load volatile double, double* poison, align 8
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%3 = load volatile double, double* poison, align 8
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%d30.0734 = phi double [ undef, %for.body ], [ %0, %entry ]
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%d01.0733 = phi double [ undef, %for.body ], [ %1, %entry ]
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%d11.0732 = phi double [ undef, %for.body ], [ %2, %entry ]
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%d21.0731 = phi double [ undef, %for.body ], [ %3, %entry ]
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br label %for.body
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}

‎llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=aarch64-w32-windows-gnu | FileCheck %s
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define i32 @foo() {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND15_PREHEADER:%.*]]
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; CHECK: for.cond15.preheader:
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; CHECK-NEXT: br label [[IF_END:%.*]]
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; CHECK: for.cond15:
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; CHECK-NEXT: br label [[IF_END_1:%.*]]
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; CHECK: if.end:
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; CHECK-NEXT: br label [[FOR_COND15:%.*]]
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; CHECK: for.end39:
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; CHECK-NEXT: switch i32 undef, label [[DO_BODY:%.*]] [
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; CHECK-NEXT: i32 0, label [[SW_BB:%.*]]
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; CHECK-NEXT: i32 1, label [[SW_BB195:%.*]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb:
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; CHECK-NEXT: [[ARRAYIDX43:%.*]] = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 1, i64 0
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; CHECK-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 2, i64 0
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; CHECK-NEXT: [[ARRAYIDX51:%.*]] = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 2, i64 1
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; CHECK-NEXT: [[ARRAYIDX58:%.*]] = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 1, i64 1
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[ARRAYIDX43]] to <4 x double>*
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x double>, <4 x double>* [[TMP0]], align 8
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; CHECK-NEXT: [[TMP2:%.*]] = fmul <4 x double> [[TMP1]], <double 0x7FF8000000000000, double 0x7FF8000000000000, double 0x7FF8000000000000, double 0x7FF8000000000000>
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; CHECK-NEXT: [[TMP3:%.*]] = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> poison, <4 x double> zeroinitializer, <4 x double> [[TMP2]])
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; CHECK-NEXT: br label [[SW_EPILOG:%.*]]
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; CHECK: sw.bb195:
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; CHECK-NEXT: br label [[SW_EPILOG]]
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; CHECK: do.body:
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; CHECK-NEXT: unreachable
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; CHECK: sw.epilog:
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; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x double> [ poison, [[SW_BB195]] ], [ [[TMP3]], [[SW_BB]] ]
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; CHECK-NEXT: ret i32 undef
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; CHECK: if.end.1:
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; CHECK-NEXT: br label [[FOR_COND15_1:%.*]]
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; CHECK: for.cond15.1:
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; CHECK-NEXT: br i1 undef, label [[FOR_END39:%.*]], label [[FOR_COND15_PREHEADER]]
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;
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entry:
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%conv = sitofp i32 undef to double
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%conv2 = sitofp i32 undef to double
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br label %for.cond15.preheader
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for.cond15.preheader: ; preds = %for.cond15.1, %entry
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br label %if.end
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for.cond15: ; preds = %if.end
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br label %if.end.1
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if.end: ; preds = %for.cond15.preheader
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br label %for.cond15
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for.end39: ; preds = %for.cond15.1
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switch i32 undef, label %do.body [
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i32 0, label %sw.bb
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i32 1, label %sw.bb195
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]
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sw.bb: ; preds = %for.end39
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%arrayidx43 = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 1, i64 0
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%0 = load double, double* %arrayidx43, align 8
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%arrayidx45 = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 2, i64 0
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%1 = load double, double* %arrayidx45, align 8
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%arrayidx51 = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 2, i64 1
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%2 = load double, double* %arrayidx51, align 8
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%arrayidx58 = getelementptr inbounds [4 x [2 x double]], [4 x [2 x double]]* undef, i32 0, i64 1, i64 1
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%3 = load double, double* %arrayidx58, align 8
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%mul = fmul double undef, %conv2
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%mul109 = fmul double undef, %conv
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%mul143 = fmul double %0, %mul
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%4 = call double @llvm.fmuladd.f64(double undef, double %conv2, double %mul143)
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%mul154 = fmul double %1, %mul109
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%5 = call double @llvm.fmuladd.f64(double undef, double %conv, double %mul154)
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%mul172 = fmul double %3, %mul
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%6 = call double @llvm.fmuladd.f64(double undef, double %conv2, double %mul172)
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%mul183 = fmul double %2, %mul109
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%7 = call double @llvm.fmuladd.f64(double undef, double %conv, double %mul183)
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br label %sw.epilog
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sw.bb195: ; preds = %for.end39
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br label %sw.epilog
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do.body: ; preds = %for.end39
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unreachable
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sw.epilog: ; preds = %sw.bb195, %sw.bb
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%x4.0 = phi double [ undef, %sw.bb195 ], [ %7, %sw.bb ]
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%x3.0 = phi double [ undef, %sw.bb195 ], [ %6, %sw.bb ]
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%x1.0 = phi double [ undef, %sw.bb195 ], [ %5, %sw.bb ]
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%x0.0 = phi double [ undef, %sw.bb195 ], [ %4, %sw.bb ]
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ret i32 undef
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if.end.1: ; preds = %for.cond15
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br label %for.cond15.1
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for.cond15.1: ; preds = %if.end.1
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br i1 undef, label %for.end39, label %for.cond15.preheader
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}
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declare double @llvm.fmuladd.f64(double, double, double)

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