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[Clang][LoongArch] Precommit test for fix wrong return value type of __iocsrrd_h. NFC
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2 files changed

+40
-10
lines changed

2 files changed

+40
-10
lines changed

clang/test/CodeGen/LoongArch/intrinsic-la32.c

Lines changed: 22 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -169,8 +169,8 @@ unsigned int cpucfg(unsigned int a) {
169169

170170
// LA32-LABEL: @rdtime(
171171
// LA32-NEXT: entry:
172-
// LA32-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimeh.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1:[0-9]+]], !srcloc !2
173-
// LA32-NEXT: [[TMP1:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimel.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc !3
172+
// LA32-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimeh.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1:[0-9]+]], !srcloc [[META2:![0-9]+]]
173+
// LA32-NEXT: [[TMP1:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimel.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc [[META3:![0-9]+]]
174174
// LA32-NEXT: ret void
175175
//
176176
void rdtime() {
@@ -201,13 +201,28 @@ void loongarch_movgr2fcsr(int a) {
201201
__builtin_loongarch_movgr2fcsr(1, a);
202202
}
203203

204-
// CHECK-LABEL: @cacop_w(
205-
// CHECK-NEXT: entry:
206-
// CHECK-NEXT: tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A:%.*]], i32 1024)
207-
// CHECK-NEXT: tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A]], i32 1024)
208-
// CHECK-NEXT: ret void
204+
// LA32-LABEL: @cacop_w(
205+
// LA32-NEXT: entry:
206+
// LA32-NEXT: tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A:%.*]], i32 1024)
207+
// LA32-NEXT: tail call void @llvm.loongarch.cacop.w(i32 1, i32 [[A]], i32 1024)
208+
// LA32-NEXT: ret void
209209
//
210210
void cacop_w(unsigned long int a) {
211211
__cacop_w(1, a, 1024);
212212
__builtin_loongarch_cacop_w(1, a, 1024);
213213
}
214+
215+
// LA32-LABEL: @iocsrrd_h_result(
216+
// LA32-NEXT: entry:
217+
// LA32-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A:%.*]])
218+
// LA32-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A]])
219+
// LA32-NEXT: [[CONV2:%.*]] = and i32 [[TMP0]], 255
220+
// LA32-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[CONV2]]
221+
// LA32-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
222+
// LA32-NEXT: ret i16 [[CONV4]]
223+
//
224+
unsigned short iocsrrd_h_result(unsigned int a) {
225+
unsigned short b = __iocsrrd_h(a);
226+
unsigned short c = __builtin_loongarch_iocsrrd_h(a);
227+
return b+c;
228+
}

clang/test/CodeGen/LoongArch/intrinsic-la64.c

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -387,7 +387,7 @@ unsigned int cpucfg(unsigned int a) {
387387

388388
// CHECK-LABEL: @rdtime_d(
389389
// CHECK-NEXT: entry:
390-
// CHECK-NEXT: [[TMP0:%.*]] = tail call { i64, i64 } asm sideeffect "rdtime.d $0, $1\0A\09", "=&r,=&r"() #[[ATTR1:[0-9]+]], !srcloc !2
390+
// CHECK-NEXT: [[TMP0:%.*]] = tail call { i64, i64 } asm sideeffect "rdtime.d $0, $1\0A\09", "=&r,=&r"() #[[ATTR1:[0-9]+]], !srcloc [[META2:![0-9]+]]
391391
// CHECK-NEXT: ret void
392392
//
393393
void rdtime_d() {
@@ -396,8 +396,8 @@ void rdtime_d() {
396396

397397
// CHECK-LABEL: @rdtime(
398398
// CHECK-NEXT: entry:
399-
// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimeh.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc !3
400-
// CHECK-NEXT: [[TMP1:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimel.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc !4
399+
// CHECK-NEXT: [[TMP0:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimeh.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc [[META3:![0-9]+]]
400+
// CHECK-NEXT: [[TMP1:%.*]] = tail call { i32, i32 } asm sideeffect "rdtimel.w $0, $1\0A\09", "=&r,=&r"() #[[ATTR1]], !srcloc [[META4:![0-9]+]]
401401
// CHECK-NEXT: ret void
402402
//
403403
void rdtime() {
@@ -427,3 +427,18 @@ void loongarch_movgr2fcsr(int a) {
427427
__movgr2fcsr(1, a);
428428
__builtin_loongarch_movgr2fcsr(1, a);
429429
}
430+
431+
// CHECK-LABEL: @iocsrrd_h_result(
432+
// CHECK-NEXT: entry:
433+
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A:%.*]])
434+
// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.loongarch.iocsrrd.h(i32 [[A]])
435+
// CHECK-NEXT: [[CONV2:%.*]] = and i32 [[TMP0]], 255
436+
// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[CONV2]]
437+
// CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
438+
// CHECK-NEXT: ret i16 [[CONV4]]
439+
//
440+
unsigned short iocsrrd_h_result(unsigned int a) {
441+
unsigned short b = __iocsrrd_h(a);
442+
unsigned short c = __builtin_loongarch_iocsrrd_h(a);
443+
return b+c;
444+
}

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