@@ -38,15 +38,15 @@ class THInstVdotVV<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
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: RVInstVV<funct6, opv, outs, ins, opcodestr, argstr> {
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let Inst{26} = 0;
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let Inst{6-0} = OPC_CUSTOM_0.Value;
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- let DecoderNamespace = "THeadV ";
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+ let DecoderNamespace = "XTHeadVdot ";
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}
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class THInstVdotVX<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins,
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string opcodestr, string argstr>
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: RVInstVX<funct6, opv, outs, ins, opcodestr, argstr> {
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let Inst{26} = 1;
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let Inst{6-0} = OPC_CUSTOM_0.Value;
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- let DecoderNamespace = "THeadV ";
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+ let DecoderNamespace = "XTHeadVdot ";
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
@@ -63,7 +63,7 @@ class THVdotALUrVX<bits<6> funct6, RISCVVFormat opv, string opcodestr>
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opcodestr, "$vd, $rs1, $vs2$vm">;
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} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
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- let Predicates = [HasVendorXTHeadBa], DecoderNamespace = "THeadBa ",
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+ let Predicates = [HasVendorXTHeadBa], DecoderNamespace = "XTHeadBa ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class THShiftALU_rri<bits<3> funct3, string opcodestr>
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: RVInstR<0, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
@@ -74,7 +74,7 @@ class THShiftALU_rri<bits<3> funct3, string opcodestr>
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let Inst{26-25} = uimm2;
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}
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- let Predicates = [HasVendorXTHeadBb], DecoderNamespace = "THeadBb ",
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+ let Predicates = [HasVendorXTHeadBb], DecoderNamespace = "XTHeadBb ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
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class THShift_ri<bits<5> funct5, bits<3> funct3, string opcodestr>
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: RVInstIShift<funct5, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
@@ -96,14 +96,14 @@ class THRev_r<bits<5> funct5, bits<2> funct2, string opcodestr>
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(outs GPR:$rd), (ins GPR:$rs1), opcodestr, "$rd, $rs1">;
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}
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- let Predicates = [HasVendorXTHeadBb, IsRV64], DecoderNamespace = "THeadBb ",
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+ let Predicates = [HasVendorXTHeadBb, IsRV64], DecoderNamespace = "XTHeadBb ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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class THShiftW_ri<bits<7> funct7, bits<3> funct3, string opcodestr>
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: RVInstIShiftW<funct7, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
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(ins GPR:$rs1, uimm5:$shamt),
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opcodestr, "$rd, $rs1, $shamt">;
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- let Predicates = [HasVendorXTHeadCondMov], DecoderNamespace = "THeadCondMov ",
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+ let Predicates = [HasVendorXTHeadCondMov], DecoderNamespace = "XTHeadCondMov ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCommutable = 1 in
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class THCondMov_rr<bits<7> funct7, string opcodestr>
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: RVInstR<funct7, 0b001, OPC_CUSTOM_0, (outs GPR:$rd_wb),
@@ -112,7 +112,7 @@ class THCondMov_rr<bits<7> funct7, string opcodestr>
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let Constraints = "$rd_wb = $rd";
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}
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- let Predicates = [HasVendorXTHeadMac], DecoderNamespace = "THeadMac ",
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+ let Predicates = [HasVendorXTHeadMac], DecoderNamespace = "XTHeadMac ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCommutable = 1 in
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class THMulAccumulate_rr<bits<7> funct7, string opcodestr>
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: RVInstR<funct7, 0b001, OPC_CUSTOM_0, (outs GPR:$rd_wb),
@@ -121,7 +121,7 @@ class THMulAccumulate_rr<bits<7> funct7, string opcodestr>
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let Constraints = "$rd_wb = $rd";
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}
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- let Predicates = [HasVendorXTHeadMemPair], DecoderNamespace = "THeadMemPair ",
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+ let Predicates = [HasVendorXTHeadMemPair], DecoderNamespace = "XTHeadMemPair ",
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hasSideEffects = 0, mayLoad = 1, mayStore = 0 in
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class THLoadPair<bits<5> funct5, string opcodestr>
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: RVInstR<!shl(funct5, 2), 0b100, OPC_CUSTOM_0,
@@ -134,7 +134,7 @@ class THLoadPair<bits<5> funct5, string opcodestr>
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let Constraints = "@earlyclobber $rd,@earlyclobber $rs2";
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}
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- let Predicates = [HasVendorXTHeadMemPair], DecoderNamespace = "THeadMemPair ",
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+ let Predicates = [HasVendorXTHeadMemPair], DecoderNamespace = "XTHeadMemPair ",
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hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
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class THStorePair<bits<5> funct5, string opcodestr>
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: RVInstR<!shl(funct5, 2), 0b101, OPC_CUSTOM_0,
@@ -249,7 +249,7 @@ def TH_SRRIW : THShiftW_ri<0b0001010, 0b001, "th.srriw">;
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def TH_REVW : THRev_r<0b10010, 0b00, "th.revw">;
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} // Predicates = [HasVendorXTHeadBb, IsRV64]
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- let Predicates = [HasVendorXTHeadBs], DecoderNamespace = "THeadBs " in {
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+ let Predicates = [HasVendorXTHeadBs], DecoderNamespace = "XTHeadBs " in {
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let IsSignExtendingOpW = 1 in
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def TH_TST : RVBShift_ri<0b10001, 0b001, OPC_CUSTOM_0, "th.tst">,
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Sched<[WriteSingleBitImm, ReadSingleBitImm]>;
@@ -292,7 +292,7 @@ def TH_SDD : THStorePair<0b11111, "th.sdd">,
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Sched<[WriteSTD, WriteSTD, ReadStoreData, ReadMemBase]>;
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}
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- let Predicates = [HasVendorXTHeadMemIdx], DecoderNamespace = "THeadMemIdx " in {
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+ let Predicates = [HasVendorXTHeadMemIdx], DecoderNamespace = "XTHeadMemIdx " in {
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// T-Head Load/Store + Update instructions.
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def TH_LBIA : THLoadUpdate<0b00011, "th.lbia">,
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Sched<[WriteLDB, ReadMemBase]>;
@@ -372,7 +372,7 @@ def TH_SURW : THStoreIndexed<GPR, 0b01010, "th.surw">,
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Sched<[WriteLDB, ReadMemBase]>;
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}
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- let Predicates = [HasVendorXTHeadMemIdx, IsRV64], DecoderNamespace = "THeadMemIdx " in {
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+ let Predicates = [HasVendorXTHeadMemIdx, IsRV64], DecoderNamespace = "XTHeadMemIdx " in {
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// T-Head Load/Store + Update instructions.
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def TH_LWUIA : THLoadUpdate<0b11011, "th.lwuia">,
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Sched<[WriteLDH, ReadMemBase]>;
@@ -409,31 +409,31 @@ def TH_SURD : THStoreIndexed<GPR, 0b01110, "th.surd">,
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// T-Head Load/Store Indexed instructions for floating point registers.
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let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtF],
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- DecoderNamespace = "THeadFMemIdx " in {
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+ DecoderNamespace = "XTHeadFMemIdx " in {
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def TH_FLRW : THLoadIndexed<FPR32, 0b01000, "th.flrw">,
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Sched<[WriteFLD32, ReadFMemBase]>;
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def TH_FSRW : THStoreIndexed<FPR32, 0b01000, "th.fsrw">,
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Sched<[WriteFST32, ReadFStoreData, ReadFMemBase]>;
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}
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let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtD],
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- DecoderNamespace = "THeadFMemIdx " in {
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+ DecoderNamespace = "XTHeadFMemIdx " in {
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def TH_FLRD : THLoadIndexed<FPR64, 0b01100, "th.flrd">,
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Sched<[WriteFLD64, ReadFMemBase]>;
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def TH_FSRD : THStoreIndexed<FPR64, 0b01100, "th.fsrd">,
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Sched<[WriteFST64, ReadFStoreData, ReadFMemBase]>;
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}
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let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtF, IsRV64],
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- DecoderNamespace = "THeadFMemIdx " in {
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+ DecoderNamespace = "XTHeadFMemIdx " in {
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def TH_FLURW : THLoadIndexed<FPR32, 0b01010, "th.flurw">,
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Sched<[WriteFLD32, ReadFMemBase]>;
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def TH_FSURW : THStoreIndexed<FPR32, 0b01010, "th.fsurw">,
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Sched<[WriteFST32, ReadFStoreData, ReadFMemBase]>;
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}
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let Predicates = [HasVendorXTHeadFMemIdx, HasStdExtD, IsRV64],
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- DecoderNamespace = "THeadFMemIdx " in {
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+ DecoderNamespace = "XTHeadFMemIdx " in {
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def TH_FLURD : THLoadIndexed<FPR64, 0b01110, "th.flurd">,
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Sched<[WriteFLD64, ReadFMemBase]>;
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def TH_FSURD : THStoreIndexed<FPR64, 0b01110, "th.fsurd">,
@@ -724,7 +724,7 @@ let Predicates = [HasVendorXTHeadMemPair] in {
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(TH_SWD GPR:$rd1, GPR:$rd2, GPR:$rs1, uimm2_3:$uimm2_3, 3)>;
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}
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- let Predicates = [HasVendorXTHeadCmo], DecoderNamespace = "THeadCmo " in {
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+ let Predicates = [HasVendorXTHeadCmo], DecoderNamespace = "XTHeadCmo " in {
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def TH_DCACHE_CSW : THCacheInst_r<0b00001, "th.dcache.csw">;
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def TH_DCACHE_ISW : THCacheInst_r<0b00010, "th.dcache.isw">;
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def TH_DCACHE_CISW : THCacheInst_r<0b00011, "th.dcache.cisw">;
@@ -749,7 +749,7 @@ def TH_L2CACHE_IALL : THCacheInst_void<0b10110, "th.l2cache.iall">;
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def TH_L2CACHE_CIALL : THCacheInst_void<0b10111, "th.l2cache.ciall">;
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}
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- let Predicates = [HasVendorXTHeadSync], DecoderNamespace = "THeadSync " in {
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+ let Predicates = [HasVendorXTHeadSync], DecoderNamespace = "XTHeadSync " in {
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def TH_SFENCE_VMAS : THCacheInst_rr<0b0000010, "th.sfence.vmas">;
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def TH_SYNC : THCacheInst_void<0b11000, "th.sync">;
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def TH_SYNC_S : THCacheInst_void<0b11001, "th.sync.s">;
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